target-ppc: fmadd/fmsub/fmnadd/fmnsub can generate VXIMZ or VXIZI exceptions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6053 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1295,6 +1295,10 @@ uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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float64_is_signaling_nan(farg3.d))) {
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/* sNaN operation */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) ||
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(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
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/* Multiplication of zero by infinity */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
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} else {
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#ifdef FLOAT128
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/* This is the way the PowerPC specification defines it */
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@ -1303,9 +1307,15 @@ uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
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ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
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ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
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if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) &&
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float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) {
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/* Magnitude subtraction of infinities */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
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} else {
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ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
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ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
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farg1.d = float128_to_float64(ft0_128, &env->fp_status);
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}
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#else
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/* This is OK on x86 hosts */
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farg1.d = (farg1.d * farg2.d) + farg3.d;
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@ -1332,6 +1342,10 @@ uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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float64_is_signaling_nan(farg3.d))) {
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/* sNaN operation */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) ||
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(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
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/* Multiplication of zero by infinity */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
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} else {
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#ifdef FLOAT128
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/* This is the way the PowerPC specification defines it */
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@ -1340,9 +1354,15 @@ uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
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ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
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ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
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if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) &&
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float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) {
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/* Magnitude subtraction of infinities */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
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} else {
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ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
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ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
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farg1.d = float128_to_float64(ft0_128, &env->fp_status);
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}
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#else
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/* This is OK on x86 hosts */
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farg1.d = (farg1.d * farg2.d) - farg3.d;
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@ -1369,6 +1389,10 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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float64_is_signaling_nan(farg3.d))) {
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/* sNaN operation */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) ||
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(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
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/* Multiplication of zero by infinity */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
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} else {
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#if USE_PRECISE_EMULATION
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#ifdef FLOAT128
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@ -1378,9 +1402,15 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
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ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
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ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
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if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) &&
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float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) {
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/* Magnitude subtraction of infinities */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
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} else {
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ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
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ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
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farg1.d= float128_to_float64(ft0_128, &env->fp_status);
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farg1.d = float128_to_float64(ft0_128, &env->fp_status);
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}
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#else
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/* This is OK on x86 hosts */
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farg1.d = (farg1.d * farg2.d) + farg3.d;
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@ -1409,6 +1439,10 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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float64_is_signaling_nan(farg3.d))) {
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/* sNaN operation */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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} else if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) ||
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(float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) {
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/* Multiplication of zero by infinity */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ);
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} else {
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#if USE_PRECISE_EMULATION
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#ifdef FLOAT128
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@ -1418,9 +1452,15 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
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ft0_128 = float64_to_float128(farg1.d, &env->fp_status);
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ft1_128 = float64_to_float128(farg2.d, &env->fp_status);
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ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
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if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) &&
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float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) {
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/* Magnitude subtraction of infinities */
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farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI);
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} else {
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ft1_128 = float64_to_float128(farg3.d, &env->fp_status);
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ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
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farg1.d = float128_to_float64(ft0_128, &env->fp_status);
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}
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#else
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/* This is OK on x86 hosts */
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farg1.d = (farg1.d * farg2.d) - farg3.d;
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