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target-mips: Fix helper and tests for dot/cross-dot product instructions

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Helper function for dpa_w_ph, dpax_w_ph, dps_w_ph and dpsx_w_ph incorrectly
defines halfword vector elements as unsigned values. This results in wrong
output which is not triggered in the tests as they also follow this logic.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Petar Jovanovic 2013-01-02 05:08:48 +01:00 committed by Aurelien Jarno
parent e320d05a53
commit da1a4cef9e
5 changed files with 39 additions and 5 deletions
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2
target-mips/dsp_helper.c
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@ -2473,7 +2473,7 @@ DP_OB(dpsu_h_obr, 0, 24, 16, 8, 0, 24, 16, 8, 0);
void helper_##name(uint32_t ac, target_ulong rs, target_ulong rt, \ void helper_##name(uint32_t ac, target_ulong rs, target_ulong rt, \
CPUMIPSState *env) \ CPUMIPSState *env) \
{ \ { \
uint16_t rsB, rsA, rtB, rtA; \ int16_t rsB, rsA, rtB, rtA; \
int32_t tempA, tempB; \ int32_t tempA, tempB; \
int64_t acc; \ int64_t acc; \
\ \

4
tests/tcg/mips/mips32-dspr2/dpa_w_ph.c
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@ -26,8 +26,8 @@ int main()
ach = 6, acl = 7; ach = 6, acl = 7;
rs = 0xFFFF00FF; rs = 0xFFFF00FF;
rt = 0xFFFF0002; rt = 0xFFFF0002;
resulth = 0x05; resulth = 0x06;
resultl = 0xfffe0206; resultl = 0x206;
__asm __asm
("mthi %0, $ac1\n\t" ("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t" "mtlo %1, $ac1\n\t"

17
tests/tcg/mips/mips32-dspr2/dpax_w_ph.c
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@ -23,5 +23,22 @@ int main()
assert(ach == resulth); assert(ach == resulth);
assert(acl == resultl); assert(acl == resultl);
ach = 6, acl = 7;
rs = 0xFFFF00FF;
rt = 0xFFFF0002;
resulth = 0x05;
resultl = 0xFFFFFF06;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dpax.w.ph $ac1, %2, %3\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
: "+r"(ach), "+r"(acl)
: "r"(rs), "r"(rt)
);
assert(ach == resulth);
assert(acl == resultl);
return 0; return 0;
} }

17
tests/tcg/mips/mips32-dspr2/dps_w_ph.c
View File

@ -23,5 +23,22 @@ int main()
assert(ach == resulth); assert(ach == resulth);
assert(acl == resultl); assert(acl == resultl);
ach = 6, acl = 7;
rs = 0xFFFF00FF;
rt = 0xFFFF0002;
resulth = 0x05;
resultl = 0xFFFFFE08;
__asm
("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t"
"dps.w.ph $ac1, %2, %3\n\t"
"mfhi %0, $ac1\n\t"
"mflo %1, $ac1\n\t"
: "+r"(ach), "+r"(acl)
: "r"(rs), "r"(rt)
);
assert(ach == resulth);
assert(acl == resultl);
return 0; return 0;
} }

4
tests/tcg/mips/mips32-dspr2/dpsx_w_ph.c
View File

@ -9,8 +9,8 @@ int main()
rs = 0xBC0123AD; rs = 0xBC0123AD;
rt = 0x01643721; rt = 0x01643721;
resulth = 0x04; resulth = 0x05;
resultl = 0xD751F050; resultl = 0xE72F050;
__asm __asm
("mthi %0, $ac1\n\t" ("mthi %0, $ac1\n\t"
"mtlo %1, $ac1\n\t" "mtlo %1, $ac1\n\t"