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Switch to qemu_ram_alloc() for memory allocation in PXA255/270.

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Pass correct RAM size to arm_load_kernel (currently unused) - thanks to BobOfDoom.
Register the Xscale Internal Memory Storage.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2784 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2007-05-08 19:03:12 +00:00
parent ce8198612e
commit d95b2f8d36
4 changed files with 35 additions and 19 deletions
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8
hw/pxa.h
View File

@ -57,7 +57,8 @@
# define PXA2XX_RX_RQ_SSP3 66
# define PXA2XX_TX_RQ_SSP3 67
# define PXA2XX_RAM_BASE 0xa0000000
# define PXA2XX_SDRAM_BASE 0xa0000000
# define PXA2XX_INTERNAL_BASE 0x5c000000
/* pxa2xx_pic.c */
struct pxa2xx_pic_state_s;
@ -200,8 +201,9 @@ struct pxa2xx_i2s_s {
# define PA_FMT "0x%08lx"
# define REG_FMT "0x%lx"
struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision);
struct pxa2xx_state_s *pxa255_init(DisplayState *ds);
struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds,
const char *revision);
struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);
void pxa2xx_reset(int line, int level, void *opaque);

18
hw/pxa2xx.c
View File

@ -1515,7 +1515,8 @@ void pxa2xx_reset(int line, int level, void *opaque)
}
/* Initialise a PXA270 integrated chip (ARM based core). */
struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
DisplayState *ds, const char *revision)
{
struct pxa2xx_state_s *s;
struct pxa2xx_ssp_s *ssp;
@ -1530,6 +1531,12 @@ struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
s->env = cpu_init();
cpu_arm_set_model(s->env, revision ?: "pxa270");
/* SDRAM & Internal Memory Storage */
cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
s->dma = pxa27x_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);
@ -1613,7 +1620,8 @@ struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
}
/* Initialise a PXA255 integrated chip (ARM based core). */
struct pxa2xx_state_s *pxa255_init(DisplayState *ds)
struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
DisplayState *ds)
{
struct pxa2xx_state_s *s;
struct pxa2xx_ssp_s *ssp;
@ -1623,6 +1631,12 @@ struct pxa2xx_state_s *pxa255_init(DisplayState *ds)
s->env = cpu_init();
cpu_arm_set_model(s->env, "pxa255");
/* SDRAM & Internal Memory Storage */
cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
s->pic = pxa2xx_pic_init(0x40d00000, s->env);
s->dma = pxa255_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);

12
hw/pxa2xx_lcd.c
View File

@ -300,11 +300,11 @@ static void pxa2xx_descriptor_load(struct pxa2xx_lcdc_s *s)
} else
descptr = s->dma_ch[i].descriptor;
if (!(descptr >= PXA2XX_RAM_BASE && descptr +
sizeof(*desc[i]) <= PXA2XX_RAM_BASE + phys_ram_size))
if (!(descptr >= PXA2XX_SDRAM_BASE && descptr +
sizeof(*desc[i]) <= PXA2XX_SDRAM_BASE + phys_ram_size))
continue;
descptr -= PXA2XX_RAM_BASE;
descptr -= PXA2XX_SDRAM_BASE;
desc[i] = (struct pxa_frame_descriptor_s *) (phys_ram_base + descptr);
s->dma_ch[i].descriptor = desc[i]->fdaddr;
s->dma_ch[i].source = desc[i]->fsaddr;
@ -855,12 +855,12 @@ static void pxa2xx_update_display(void *opaque)
continue;
}
fbptr = s->dma_ch[ch].source;
if (!(fbptr >= PXA2XX_RAM_BASE &&
fbptr <= PXA2XX_RAM_BASE + phys_ram_size)) {
if (!(fbptr >= PXA2XX_SDRAM_BASE &&
fbptr <= PXA2XX_SDRAM_BASE + phys_ram_size)) {
pxa2xx_dma_ber_set(s, ch);
continue;
}
fbptr -= PXA2XX_RAM_BASE;
fbptr -= PXA2XX_SDRAM_BASE;
fb = phys_ram_base + fbptr;
if (s->dma_ch[ch].command & LDCMD_PAL) {

16
hw/spitz.c
View File

@ -1001,19 +1001,19 @@ static void spitz_common_init(int ram_size, int vga_ram_size,
if (!cpu_model)
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
cpu = pxa270_init(ds, cpu_model);
/* Setup memory */
/* Setup CPU & memory */
if (ram_size < spitz_ram + spitz_rom) {
fprintf(stderr, "This platform requires %i bytes of memory\n",
spitz_ram + spitz_rom);
exit(1);
}
cpu_register_physical_memory(PXA2XX_RAM_BASE, spitz_ram, IO_MEM_RAM);
cpu = pxa270_init(spitz_ram, ds, cpu_model);
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
cpu_register_physical_memory(0, spitz_rom, spitz_ram | IO_MEM_ROM);
cpu_register_physical_memory(0, spitz_rom,
qemu_ram_alloc(spitz_rom) | IO_MEM_ROM);
/* Setup peripherals */
spitz_keyboard_register(cpu);
@ -1034,11 +1034,11 @@ static void spitz_common_init(int ram_size, int vga_ram_size,
spitz_microdrive_attach(cpu);
/* Setup initial (reset) machine state */
cpu->env->regs[15] = PXA2XX_RAM_BASE;
cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
arm_load_kernel(cpu->env, ram_size, kernel_filename, kernel_cmdline,
initrd_filename, arm_id, PXA2XX_RAM_BASE);
sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_RAM_BASE);
arm_load_kernel(cpu->env, spitz_ram, kernel_filename, kernel_cmdline,
initrd_filename, arm_id, PXA2XX_SDRAM_BASE);
sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE);
}
static void spitz_init(int ram_size, int vga_ram_size, int boot_device,