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Here are a bunch of 1.7-tagged patches that I was afraid

Browse Source 
were getting forgotten or that did not have a clear maintainer responsible
 for making a pull request.
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Merge remote-tracking branch 'bonzini/tags/for-anthony' into staging

Here are a bunch of 1.7-tagged patches that I was afraid
were getting forgotten or that did not have a clear maintainer responsible
for making a pull request.

# gpg: Signature made Thu 21 Nov 2013 08:40:59 AM PST using RSA key ID 9B4D86F2
# gpg: Can't check signature: public key not found

# By Peter Maydell (3) and others
# Via Paolo Bonzini
* bonzini/tags/for-anthony:
  qga: Fix compiler warnings (missing format attribute, wrong format strings)
  mips jazz: do not raise data bus exception when accessing invalid addresses
  target-i386: yield to another VCPU on PAUSE
  rng-egd: offset the point when repeatedly read from the buffer
  rng-egd: remove redundant free
  target-i386: Fix build by providing stub kvm_arch_get_supported_cpuid()
  vfio-pci: Fix multifunction=on
  atomic.h: Fix build with clang
  pc: get rid of builtin pvpanic for "-M pc-1.5"
  configure: Explicitly set ARFLAGS so we can build with GNU Make 4.0
  sun4m: Add FCode ROM for TCX framebuffer

Message-id: 1385052578-32352-1-git-send-email-pbonzini@redhat.com
Signed-off-by: Anthony Liguori <aliguori@amazon.com>
This commit is contained in:
Anthony Liguori 2013-11-25 09:41:24 -08:00
commit d916adaa60
13 changed files with 60 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -293,7 +293,7 @@ ifdef INSTALL_BLOBS
BLOBS=bios.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \
vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin \
acpi-dsdt.aml q35-acpi-dsdt.aml \
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc \
ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin \
pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
efi-e1000.rom efi-eepro100.rom efi-ne2k_pci.rom \

5
configure vendored
View File

@ -325,6 +325,9 @@ query_pkg_config() {
pkg_config=query_pkg_config
sdl_config="${SDL_CONFIG-${cross_prefix}sdl-config}"
# If the user hasn't specified ARFLAGS, default to 'rv', just as make does.
ARFLAGS="${ARFLAGS-rv}"
# default flags for all hosts
QEMU_CFLAGS="-fno-strict-aliasing $QEMU_CFLAGS"
QEMU_CFLAGS="-Wall -Wundef -Wwrite-strings -Wmissing-prototypes $QEMU_CFLAGS"
@ -3695,6 +3698,7 @@ echo "C compiler $cc"
echo "Host C compiler $host_cc"
echo "C++ compiler $cxx"
echo "Objective-C compiler $objcc"
echo "ARFLAGS $ARFLAGS"
echo "CFLAGS $CFLAGS"
echo "QEMU_CFLAGS $QEMU_CFLAGS"
echo "LDFLAGS $LDFLAGS"
@ -4276,6 +4280,7 @@ echo "HOST_CC=$host_cc" >> $config_host_mak
echo "CXX=$cxx" >> $config_host_mak
echo "OBJCC=$objcc" >> $config_host_mak
echo "AR=$ar" >> $config_host_mak
echo "ARFLAGS=$ARFLAGS" >> $config_host_mak
echo "AS=$as" >> $config_host_mak
echo "CPP=$cpp" >> $config_host_mak
echo "OBJCOPY=$objcopy" >> $config_host_mak

26
hw/display/tcx.c
View File

@ -25,8 +25,12 @@
#include "qemu-common.h"
#include "ui/console.h"
#include "ui/pixel_ops.h"
#include "hw/loader.h"
#include "hw/sysbus.h"
#define TCX_ROM_FILE "QEMU,tcx.bin"
#define FCODE_MAX_ROM_SIZE 0x10000
#define MAXX 1024
#define MAXY 768
#define TCX_DAC_NREGS 16
@ -43,6 +47,8 @@ typedef struct TCXState {
QemuConsole *con;
uint8_t *vram;
uint32_t *vram24, *cplane;
hwaddr prom_addr;
MemoryRegion rom;
MemoryRegion vram_mem;
MemoryRegion vram_8bit;
MemoryRegion vram_24bit;
@ -529,14 +535,31 @@ static int tcx_init1(SysBusDevice *dev)
{
TCXState *s = TCX(dev);
ram_addr_t vram_offset = 0;
int size;
int size, ret;
uint8_t *vram_base;
char *fcode_filename;
memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram",
s->vram_size * (1 + 4 + 4));
vmstate_register_ram_global(&s->vram_mem);
vram_base = memory_region_get_ram_ptr(&s->vram_mem);
/* FCode ROM */
memory_region_init_ram(&s->rom, NULL, "tcx.prom", FCODE_MAX_ROM_SIZE);
vmstate_register_ram_global(&s->rom);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(dev, &s->rom);
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE);
if (fcode_filename) {
ret = load_image_targphys(fcode_filename, s->prom_addr,
FCODE_MAX_ROM_SIZE);
if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) {
fprintf(stderr, "tcx: could not load prom '%s'\n", TCX_ROM_FILE);
return -1;
}
}
/* 8-bit plane */
s->vram = vram_base;
size = s->vram_size;
@ -598,6 +621,7 @@ static Property tcx_properties[] = {
DEFINE_PROP_UINT16("width", TCXState, width, -1),
DEFINE_PROP_UINT16("height", TCXState, height, -1),
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
DEFINE_PROP_HEX64("prom_addr", TCXState, prom_addr, -1),
DEFINE_PROP_END_OF_LIST(),
};

7
hw/i386/pc_piix.c
View File

@ -57,7 +57,6 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pvpanic;
static bool has_pci_info;
static bool has_acpi_build = true;
@ -229,10 +228,6 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pc_pci_device_init(pci_bus);
}
if (has_pvpanic) {
pvpanic_init(isa_bus);
}
}
static void pc_init_pci(QEMUMachineInitArgs *args)
@ -250,13 +245,11 @@ static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_5(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
has_pvpanic = true;
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
{
pc_compat_1_5(args);
has_pvpanic = false;
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}

7
hw/i386/pc_q35.c
View File

@ -47,7 +47,6 @@
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
static bool has_pvpanic;
static bool has_pci_info;
static bool has_acpi_build = true;
@ -216,10 +215,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
if (pci_enabled) {
pc_pci_device_init(host_bus);
}
if (has_pvpanic) {
pvpanic_init(isa_bus);
}
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
@ -232,13 +227,11 @@ static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_5(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
has_pvpanic = true;
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
{
pc_compat_1_5(args);
has_pvpanic = false;
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}

5
hw/misc/pvpanic.c
View File

@ -112,11 +112,6 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
isa_register_ioport(d, &s->io, s->ioport);
}
void pvpanic_init(ISABus *bus)
{
isa_create_simple(bus, TYPE_ISA_PVPANIC_DEVICE);
}
#define PVPANIC_IOPORT_PROP "ioport"
uint16_t pvpanic_port(void)

17
hw/sparc/sun4m.c
View File

@ -537,24 +537,27 @@ static void tcx_init(hwaddr addr, int vram_size, int width,
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
qdev_prop_set_uint64(dev, "prom_addr", addr);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
/* FCode ROM */
sysbus_mmio_map(s, 0, addr);
/* 8-bit plane */
sysbus_mmio_map(s, 0, addr + 0x00800000ULL);
sysbus_mmio_map(s, 1, addr + 0x00800000ULL);
/* DAC */
sysbus_mmio_map(s, 1, addr + 0x00200000ULL);
sysbus_mmio_map(s, 2, addr + 0x00200000ULL);
/* TEC (dummy) */
sysbus_mmio_map(s, 2, addr + 0x00700000ULL);
sysbus_mmio_map(s, 3, addr + 0x00700000ULL);
/* THC 24 bit: NetBSD writes here even with 8-bit display: dummy */
sysbus_mmio_map(s, 3, addr + 0x00301000ULL);
sysbus_mmio_map(s, 4, addr + 0x00301000ULL);
if (depth == 24) {
/* 24-bit plane */
sysbus_mmio_map(s, 4, addr + 0x02000000ULL);
sysbus_mmio_map(s, 5, addr + 0x02000000ULL);
/* Control plane */
sysbus_mmio_map(s, 5, addr + 0x0a000000ULL);
sysbus_mmio_map(s, 6, addr + 0x0a000000ULL);
} else {
/* THC 8 bit (dummy) */
sysbus_mmio_map(s, 4, addr + 0x00300000ULL);
sysbus_mmio_map(s, 5, addr + 0x00300000ULL);
}
}

1
include/hw/i386/pc.h
View File

@ -235,7 +235,6 @@ void pc_system_firmware_init(MemoryRegion *rom_memory,
bool isapc_ram_fw);
/* pvpanic.c */
void pvpanic_init(ISABus *bus);
uint16_t pvpanic_port(void);
/* e820 types */

BIN
pc-bios/QEMU,tcx.bin Normal file
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Binary file not shown.

4
pc-bios/README
View File

@ -11,8 +11,8 @@
firmware implementation. The goal is to implement a 100% IEEE
1275-1994 (referred to as Open Firmware) compliant firmware.
The included images for PowerPC (for 32 and 64 bit PPC CPUs),
Sparc32 and Sparc64 are built from OpenBIOS SVN revision
1229.
Sparc32 (including QEMU,tcx.bin) and Sparc64 are built from OpenBIOS SVN
revision 1229.
- SLOF (Slimline Open Firmware) is a free IEEE 1275 Open Firmware
implementation for certain IBM POWER hardware. The sources are at

8
qga/commands-posix.c
View File

@ -401,7 +401,7 @@ int64_t qmp_guest_file_open(const char *path, bool has_mode, const char *mode, E
return -1;
}
slog("guest-file-open, handle: %d", handle);
slog("guest-file-open, handle: %" PRId64, handle);
return handle;
}
@ -410,7 +410,7 @@ void qmp_guest_file_close(int64_t handle, Error **err)
GuestFileHandle *gfh = guest_file_handle_find(handle, err);
int ret;
slog("guest-file-close called, handle: %ld", handle);
slog("guest-file-close called, handle: %" PRId64, handle);
if (!gfh) {
return;
}
@ -451,7 +451,7 @@ struct GuestFileRead *qmp_guest_file_read(int64_t handle, bool has_count,
read_count = fread(buf, 1, count, fh);
if (ferror(fh)) {
error_setg_errno(err, errno, "failed to read file");
slog("guest-file-read failed, handle: %ld", handle);
slog("guest-file-read failed, handle: %" PRId64, handle);
} else {
buf[read_count] = 0;
read_data = g_malloc0(sizeof(GuestFileRead));
@ -496,7 +496,7 @@ GuestFileWrite *qmp_guest_file_write(int64_t handle, const char *buf_b64,
write_count = fwrite(buf, 1, count, fh);
if (ferror(fh)) {
error_setg_errno(err, errno, "failed to write to file");
slog("guest-file-write failed, handle: %ld", handle);
slog("guest-file-write failed, handle: %" PRId64, handle);
} else {
write_data = g_malloc0(sizeof(GuestFileWrite));
write_data->count = write_count;

2
qga/guest-agent-core.h
View File

@ -29,7 +29,7 @@ GACommandState *ga_command_state_new(void);
bool ga_logging_enabled(GAState *s);
void ga_disable_logging(GAState *s);
void ga_enable_logging(GAState *s);
void slog(const gchar *fmt, ...);
void GCC_FMT_ATTR(1, 2) slog(const gchar *fmt, ...);
void ga_set_response_delimited(GAState *s);
bool ga_is_frozen(GAState *s);
void ga_set_frozen(GAState *s);

12
target-i386/kvm-stub.c
View File

@ -16,3 +16,15 @@ bool kvm_allows_irq0_override(void)
{
return 1;
}
#ifndef __OPTIMIZE__
/* This function is only called inside conditionals which we
* rely on the compiler to optimize out when CONFIG_KVM is not
* defined.
*/
uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
uint32_t index, int reg)
{
abort();
}
#endif