target-ppc: Add xviexpsp instruction
xviexpsp: VSX Vector Insert Exponent Single Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -1344,6 +1344,32 @@ static void gen_xsxsigqp(DisasContext *ctx)
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}
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#endif
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static void gen_xviexpsp(DisasContext *ctx)
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{
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TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode));
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TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode));
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TCGv_i64 xah = cpu_vsrh(xA(ctx->opcode));
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TCGv_i64 xal = cpu_vsrl(xA(ctx->opcode));
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TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode));
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TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode));
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TCGv_i64 t0;
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if (unlikely(!ctx->vsx_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_VSXU);
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return;
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}
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t0 = tcg_temp_new_i64();
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tcg_gen_andi_i64(xth, xah, 0x807FFFFF807FFFFF);
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tcg_gen_andi_i64(t0, xbh, 0xFF000000FF);
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tcg_gen_shli_i64(t0, t0, 23);
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tcg_gen_or_i64(xth, xth, t0);
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tcg_gen_andi_i64(xtl, xal, 0x807FFFFF807FFFFF);
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tcg_gen_andi_i64(t0, xbl, 0xFF000000FF);
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tcg_gen_shli_i64(t0, t0, 23);
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tcg_gen_or_i64(xtl, xtl, t0);
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tcg_temp_free_i64(t0);
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}
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#undef GEN_XX2FORM
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#undef GEN_XX3FORM
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#undef GEN_XX2IFORM
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@ -124,6 +124,8 @@ GEN_HANDLER_E(xsiexpdp, 0x3C, 0x16, 0x1C, 0, PPC_NONE, PPC2_ISA300),
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GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001),
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#endif
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GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300),
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GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
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GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX),
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GEN_XX2FORM(xvnegdp, 0x12, 0x1F, PPC2_VSX),
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