xilinx_axidma: (un)reversed irq initialisation

The axidma irq orders are reversed in both the device model and the instantion.
Undid both reversal (for no net change). Also needs to be reversed for
consistency with Xilinx tools IRQ listing.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Peter A. G. Crosthwaite 2012-06-13 14:46:50 +10:00 committed by Edgar E. Iglesias
parent 07f9fd4864
commit d85ba787c5
2 changed files with 3 additions and 3 deletions

View File

@ -81,8 +81,8 @@ xilinx_axiethernetdma_create(void *dmach,
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);
return dev;
}

View File

@ -463,8 +463,8 @@ static int xilinx_axidma_init(SysBusDevice *dev)
struct XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), dev);
int i;
sysbus_init_irq(dev, &s->streams[1].irq);
sysbus_init_irq(dev, &s->streams[0].irq);
sysbus_init_irq(dev, &s->streams[1].irq);
if (!s->dmach) {
hw_error("Unconnected DMA channel.\n");