hw/nvme: reimplement dsm to allow cancellation
Prior to this patch, a loop was used to issue multiple "fire and forget" aios for each range in the command. Without a reference to the aiocb returned from the blk_aio_pdiscard calls, the aios cannot be canceled. Fix this by processing the ranges one after another. As a bonus, this fixes how metadata is cleared (i.e. we only zero it out if the data was succesfully discarded). Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
This commit is contained in:
Klaus Jensen
parent
ff0ac2c8b8
commit
d7d1474fd8
233
hw/nvme/ctrl.c
233
hw/nvme/ctrl.c
@ -2015,26 +2015,6 @@ out:
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nvme_verify_cb(ctx, ret);
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}
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static void nvme_aio_discard_cb(void *opaque, int ret)
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{
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NvmeRequest *req = opaque;
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uintptr_t *discards = (uintptr_t *)&req->opaque;
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trace_pci_nvme_aio_discard_cb(nvme_cid(req));
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if (ret) {
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nvme_aio_err(req, ret);
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}
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(*discards)--;
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if (*discards) {
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return;
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}
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nvme_enqueue_req_completion(nvme_cq(req), req);
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}
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struct nvme_zone_reset_ctx {
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NvmeRequest *req;
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NvmeZone *zone;
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@ -2495,75 +2475,182 @@ out:
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nvme_enqueue_req_completion(nvme_cq(req), req);
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}
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typedef struct NvmeDSMAIOCB {
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BlockAIOCB common;
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BlockAIOCB *aiocb;
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NvmeRequest *req;
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QEMUBH *bh;
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int ret;
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NvmeDsmRange *range;
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unsigned int nr;
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unsigned int idx;
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} NvmeDSMAIOCB;
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static void nvme_dsm_cancel(BlockAIOCB *aiocb)
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{
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NvmeDSMAIOCB *iocb = container_of(aiocb, NvmeDSMAIOCB, common);
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/* break nvme_dsm_cb loop */
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iocb->idx = iocb->nr;
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iocb->ret = -ECANCELED;
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if (iocb->aiocb) {
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blk_aio_cancel_async(iocb->aiocb);
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iocb->aiocb = NULL;
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} else {
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/*
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* We only reach this if nvme_dsm_cancel() has already been called or
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* the command ran to completion and nvme_dsm_bh is scheduled to run.
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*/
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assert(iocb->idx == iocb->nr);
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}
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}
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static const AIOCBInfo nvme_dsm_aiocb_info = {
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.aiocb_size = sizeof(NvmeDSMAIOCB),
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.cancel_async = nvme_dsm_cancel,
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};
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static void nvme_dsm_bh(void *opaque)
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{
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NvmeDSMAIOCB *iocb = opaque;
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iocb->common.cb(iocb->common.opaque, iocb->ret);
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qemu_bh_delete(iocb->bh);
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iocb->bh = NULL;
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qemu_aio_unref(iocb);
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}
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static void nvme_dsm_cb(void *opaque, int ret);
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static void nvme_dsm_md_cb(void *opaque, int ret)
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{
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NvmeDSMAIOCB *iocb = opaque;
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NvmeRequest *req = iocb->req;
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NvmeNamespace *ns = req->ns;
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NvmeDsmRange *range;
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uint64_t slba;
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uint32_t nlb;
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if (ret < 0) {
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iocb->ret = ret;
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goto done;
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}
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if (!ns->lbaf.ms) {
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nvme_dsm_cb(iocb, 0);
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return;
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}
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range = &iocb->range[iocb->idx - 1];
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slba = le64_to_cpu(range->slba);
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nlb = le32_to_cpu(range->nlb);
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/*
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* Check that all block were discarded (zeroed); otherwise we do not zero
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* the metadata.
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*/
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ret = nvme_block_status_all(ns, slba, nlb, BDRV_BLOCK_ZERO);
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if (ret) {
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if (ret < 0) {
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iocb->ret = ret;
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goto done;
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}
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nvme_dsm_cb(iocb, 0);
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}
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iocb->aiocb = blk_aio_pwrite_zeroes(ns->blkconf.blk, nvme_moff(ns, slba),
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nvme_m2b(ns, nlb), BDRV_REQ_MAY_UNMAP,
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nvme_dsm_cb, iocb);
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return;
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done:
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iocb->aiocb = NULL;
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qemu_bh_schedule(iocb->bh);
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}
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static void nvme_dsm_cb(void *opaque, int ret)
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{
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NvmeDSMAIOCB *iocb = opaque;
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NvmeRequest *req = iocb->req;
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NvmeCtrl *n = nvme_ctrl(req);
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NvmeNamespace *ns = req->ns;
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NvmeDsmRange *range;
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uint64_t slba;
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uint32_t nlb;
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if (ret < 0) {
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iocb->ret = ret;
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goto done;
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}
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next:
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if (iocb->idx == iocb->nr) {
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goto done;
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}
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range = &iocb->range[iocb->idx++];
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slba = le64_to_cpu(range->slba);
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nlb = le32_to_cpu(range->nlb);
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trace_pci_nvme_dsm_deallocate(slba, nlb);
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if (nlb > n->dmrsl) {
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trace_pci_nvme_dsm_single_range_limit_exceeded(nlb, n->dmrsl);
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goto next;
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}
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if (nvme_check_bounds(ns, slba, nlb)) {
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trace_pci_nvme_err_invalid_lba_range(slba, nlb,
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ns->id_ns.nsze);
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goto next;
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}
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iocb->aiocb = blk_aio_pdiscard(ns->blkconf.blk, nvme_l2b(ns, slba),
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nvme_l2b(ns, nlb),
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nvme_dsm_md_cb, iocb);
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return;
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done:
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iocb->aiocb = NULL;
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qemu_bh_schedule(iocb->bh);
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}
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static uint16_t nvme_dsm(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeNamespace *ns = req->ns;
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NvmeDsmCmd *dsm = (NvmeDsmCmd *) &req->cmd;
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uint32_t attr = le32_to_cpu(dsm->attributes);
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uint32_t nr = (le32_to_cpu(dsm->nr) & 0xff) + 1;
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uint16_t status = NVME_SUCCESS;
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trace_pci_nvme_dsm(nvme_cid(req), nvme_nsid(ns), nr, attr);
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trace_pci_nvme_dsm(nr, attr);
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if (attr & NVME_DSMGMT_AD) {
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int64_t offset;
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size_t len;
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NvmeDsmRange range[nr];
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uintptr_t *discards = (uintptr_t *)&req->opaque;
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NvmeDSMAIOCB *iocb = blk_aio_get(&nvme_dsm_aiocb_info, ns->blkconf.blk,
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nvme_misc_cb, req);
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status = nvme_h2c(n, (uint8_t *)range, sizeof(range), req);
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iocb->req = req;
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iocb->bh = qemu_bh_new(nvme_dsm_bh, iocb);
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iocb->ret = 0;
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iocb->range = g_new(NvmeDsmRange, nr);
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iocb->nr = nr;
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iocb->idx = 0;
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status = nvme_h2c(n, (uint8_t *)iocb->range, sizeof(NvmeDsmRange) * nr,
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req);
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if (status) {
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return status;
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}
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/*
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* AIO callbacks may be called immediately, so initialize discards to 1
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* to make sure the the callback does not complete the request before
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* all discards have been issued.
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*/
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*discards = 1;
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req->aiocb = &iocb->common;
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nvme_dsm_cb(iocb, 0);
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for (int i = 0; i < nr; i++) {
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uint64_t slba = le64_to_cpu(range[i].slba);
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uint32_t nlb = le32_to_cpu(range[i].nlb);
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if (nvme_check_bounds(ns, slba, nlb)) {
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continue;
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}
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trace_pci_nvme_dsm_deallocate(nvme_cid(req), nvme_nsid(ns), slba,
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nlb);
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if (nlb > n->dmrsl) {
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trace_pci_nvme_dsm_single_range_limit_exceeded(nlb, n->dmrsl);
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}
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offset = nvme_l2b(ns, slba);
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len = nvme_l2b(ns, nlb);
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while (len) {
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size_t bytes = MIN(BDRV_REQUEST_MAX_BYTES, len);
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(*discards)++;
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blk_aio_pdiscard(ns->blkconf.blk, offset, bytes,
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nvme_aio_discard_cb, req);
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offset += bytes;
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len -= bytes;
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}
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}
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/* account for the 1-initialization */
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(*discards)--;
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if (*discards) {
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status = NVME_NO_COMPLETE;
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} else {
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status = req->status;
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}
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return NVME_NO_COMPLETE;
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}
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return status;
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@ -37,8 +37,8 @@ pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" bl
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pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) "cid %"PRIu16" prinfo 0x%"PRIx8" apptag 0x%"PRIx16" appmask 0x%"PRIx16" reftag 0x%"PRIx32""
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pci_nvme_rw_complete_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x zeroed %d"
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pci_nvme_dsm(uint16_t cid, uint32_t nsid, uint32_t nr, uint32_t attr) "cid %"PRIu16" nsid %"PRIu32" nr %"PRIu32" attr 0x%"PRIx32""
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pci_nvme_dsm_deallocate(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
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pci_nvme_dsm(uint32_t nr, uint32_t attr) "nr %"PRIu32" attr 0x%"PRIx32""
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pci_nvme_dsm_deallocate(uint64_t slba, uint32_t nlb) "slba %"PRIu64" nlb %"PRIu32""
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pci_nvme_dsm_single_range_limit_exceeded(uint32_t nlb, uint32_t dmrsl) "nlb %"PRIu32" dmrsl %"PRIu32""
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pci_nvme_compare(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba 0x%"PRIx64" nlb %"PRIu32""
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pci_nvme_compare_data_cb(uint16_t cid) "cid %"PRIu16""
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