From d6929309b689264755963fe5ee18767a7f1c4af5 Mon Sep 17 00:00:00 2001
From: ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Wed, 25 Apr 2007 16:41:11 +0000
Subject: [PATCH] Next attempt to get the lui sign extension right.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-mips/op_template.c | 2 +-
 target-mips/translate.c   | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/target-mips/op_template.c b/target-mips/op_template.c
index 8d4c4e4048..04677cd840 100644
--- a/target-mips/op_template.c
+++ b/target-mips/op_template.c
@@ -54,7 +54,7 @@ void glue(op_load_gpr_T2_gpr, REG) (void)
 #define SET_RESET(treg, tregname)        \
     void glue(op_set, tregname)(void)    \
     {                                    \
-        treg = PARAM1;                   \
+        treg = (int32_t)PARAM1;          \
         RETURN();                        \
     }                                    \
     void glue(op_reset, tregname)(void)  \
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 96a0f37d27..06581f2cc6 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -907,8 +907,7 @@ static void gen_arith_imm (DisasContext *ctx, uint32_t opc, int rt,
         GEN_LOAD_IMM_TN(T1, uimm);
         break;
     case OPC_LUI:
-        uimm =  (int32_t)(imm << 16);
-        GEN_LOAD_IMM_TN(T0, uimm);
+        GEN_LOAD_IMM_TN(T0, uimm << 16);
         break;
     case OPC_SLL:
     case OPC_SRA: