hw/arm/stm32f100: Report error when incorrect CPU is used
The 'stm32vldiscovery' machine ignores the CPU type requested by
the command line. This might confuse users, since the following
will create a machine with a Cortex-M3 CPU:
$ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1
Set the MachineClass::valid_cpu_types field (introduced in commit
c9cf636d48
"machine: Add a valid_cpu_types property").
Remove the now unused MachineClass::default_cpu_type field.
We now get:
$ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1
qemu-system-aarch64: Invalid CPU type: neoverse-n1-arm-cpu
The valid types are: cortex-m3-arm-cpu
Since the SoC family can only use Cortex-M3 CPUs, hard-code the
CPU type name at the SoC level, removing the QOM property
entirely.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-id: 20231117071704.35040-5-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
ff6cda35f1
commit
d652866007
@ -115,7 +115,7 @@ static void stm32f100_soc_realize(DeviceState *dev_soc, Error **errp)
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/* Init ARMv7m */
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armv7m = DEVICE(&s->armv7m);
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qdev_prop_set_uint32(armv7m, "num-irq", 61);
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qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
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qdev_prop_set_string(armv7m, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
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qdev_prop_set_bit(armv7m, "enable-bitband", true);
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qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
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qdev_connect_clock_in(armv7m, "refclk", s->refclk);
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@ -180,17 +180,12 @@ static void stm32f100_soc_realize(DeviceState *dev_soc, Error **errp)
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create_unimplemented_device("CRC", 0x40023000, 0x400);
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}
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static Property stm32f100_soc_properties[] = {
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DEFINE_PROP_STRING("cpu-type", STM32F100State, cpu_type),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void stm32f100_soc_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = stm32f100_soc_realize;
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device_class_set_props(dc, stm32f100_soc_properties);
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/* No vmstate or reset required: device has no internal state */
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}
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static const TypeInfo stm32f100_soc_info = {
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@ -47,7 +47,6 @@ static void stm32vldiscovery_init(MachineState *machine)
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clock_set_hz(sysclk, SYSCLK_FRQ);
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dev = qdev_new(TYPE_STM32F100_SOC);
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qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
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qdev_connect_clock_in(dev, "sysclk", sysclk);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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@ -58,8 +57,14 @@ static void stm32vldiscovery_init(MachineState *machine)
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static void stm32vldiscovery_machine_init(MachineClass *mc)
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{
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static const char * const valid_cpu_types[] = {
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ARM_CPU_TYPE_NAME("cortex-m3"),
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NULL
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};
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mc->desc = "ST STM32VLDISCOVERY (Cortex-M3)";
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mc->init = stm32vldiscovery_init;
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mc->valid_cpu_types = valid_cpu_types;
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}
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DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init)
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@ -43,12 +43,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(STM32F100State, STM32F100_SOC)
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#define SRAM_SIZE (8 * 1024)
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struct STM32F100State {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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char *cpu_type;
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ARMv7MState armv7m;
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STM32F2XXUsartState usart[STM_NUM_USARTS];
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