pcie: implement slot power control for pcie root ports
With this patch hot-plugged pci devices will only be visible to the guest if the guests hotplug driver has enabled slot power. This should fix the hot-plug race which one can hit when hot-plugging a pci device at boot, while the guest is in the middle of the pci bus scan. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20211111130859.1171890-3-kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -366,6 +366,29 @@ static void hotplug_event_clear(PCIDevice *dev)
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}
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}
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}
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}
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static void pcie_set_power_device(PCIBus *bus, PCIDevice *dev, void *opaque)
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{
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bool *power = opaque;
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pci_set_power(dev, *power);
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}
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static void pcie_cap_update_power(PCIDevice *hotplug_dev)
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{
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uint8_t *exp_cap = hotplug_dev->config + hotplug_dev->exp.exp_cap;
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PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(hotplug_dev));
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uint32_t sltcap = pci_get_long(exp_cap + PCI_EXP_SLTCAP);
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uint16_t sltctl = pci_get_word(exp_cap + PCI_EXP_SLTCTL);
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bool power = true;
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if (sltcap & PCI_EXP_SLTCAP_PCP) {
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power = (sltctl & PCI_EXP_SLTCTL_PCC) == PCI_EXP_SLTCTL_PWR_ON;
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}
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pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
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pcie_set_power_device, &power);
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}
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/*
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/*
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* A PCI Express Hot-Plug Event has occurred, so update slot status register
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* A PCI Express Hot-Plug Event has occurred, so update slot status register
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* and notify OS of the event if necessary.
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* and notify OS of the event if necessary.
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@ -434,6 +457,7 @@ void pcie_cap_slot_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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pci_word_test_and_set_mask(exp_cap + PCI_EXP_LNKSTA,
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pci_word_test_and_set_mask(exp_cap + PCI_EXP_LNKSTA,
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PCI_EXP_LNKSTA_DLLLA);
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PCI_EXP_LNKSTA_DLLLA);
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}
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}
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pcie_cap_update_power(hotplug_pdev);
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return;
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return;
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}
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}
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@ -451,6 +475,7 @@ void pcie_cap_slot_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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}
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}
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pcie_cap_slot_event(hotplug_pdev,
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pcie_cap_slot_event(hotplug_pdev,
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PCI_EXP_HP_EV_PDC | PCI_EXP_HP_EV_ABP);
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PCI_EXP_HP_EV_PDC | PCI_EXP_HP_EV_ABP);
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pcie_cap_update_power(hotplug_pdev);
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}
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}
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}
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}
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@ -625,6 +650,7 @@ void pcie_cap_slot_reset(PCIDevice *dev)
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PCI_EXP_SLTSTA_PDC |
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PCI_EXP_SLTSTA_PDC |
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PCI_EXP_SLTSTA_ABP);
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PCI_EXP_SLTSTA_ABP);
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pcie_cap_update_power(dev);
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hotplug_event_update_event_status(dev);
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hotplug_event_update_event_status(dev);
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}
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}
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@ -705,6 +731,7 @@ void pcie_cap_slot_write_config(PCIDevice *dev,
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pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA,
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pci_word_test_and_set_mask(exp_cap + PCI_EXP_SLTSTA,
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PCI_EXP_SLTSTA_PDC);
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PCI_EXP_SLTSTA_PDC);
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}
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}
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pcie_cap_update_power(dev);
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hotplug_event_notify(dev);
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hotplug_event_notify(dev);
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@ -731,6 +758,7 @@ int pcie_cap_slot_post_load(void *opaque, int version_id)
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{
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{
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PCIDevice *dev = opaque;
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PCIDevice *dev = opaque;
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hotplug_event_update_event_status(dev);
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hotplug_event_update_event_status(dev);
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pcie_cap_update_power(dev);
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return 0;
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return 0;
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}
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}
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