target-arm: Rename and move gt_cnt_reset
Rename gt_cnt_reset to gt_timer_reset as the function really resets the timers and not the counters. Move the registration from counter regs to timer regs. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1436791864-4582-4-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1261,7 +1261,7 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)
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}
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}
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static void gt_cnt_reset(CPUARMState *env, const ARMCPRegInfo *ri)
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static void gt_timer_reset(CPUARMState *env, const ARMCPRegInfo *ri)
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{
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ARMCPU *cpu = arm_env_get_cpu(env);
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int timeridx = ri->opc1 & 1;
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@ -1414,7 +1414,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTP_TVAL_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 2, .opc2 = 0,
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.type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R,
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.accessfn = gt_ptimer_access,
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.accessfn = gt_ptimer_access, .resetfn = gt_timer_reset,
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.readfn = gt_tval_read, .writefn = gt_tval_write,
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},
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{ .name = "CNTV_TVAL", .cp = 15, .crn = 14, .crm = 3, .opc1 = 0, .opc2 = 0,
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@ -1425,7 +1425,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTV_TVAL_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 3, .opc2 = 0,
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.type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R,
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.accessfn = gt_vtimer_access,
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.accessfn = gt_vtimer_access, .resetfn = gt_timer_reset,
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.readfn = gt_tval_read, .writefn = gt_tval_write,
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},
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/* The counter itself */
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@ -1437,8 +1437,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTPCT_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 1,
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.access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO,
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.accessfn = gt_pct_access,
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.readfn = gt_cnt_read, .resetfn = gt_cnt_reset,
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.accessfn = gt_pct_access, .readfn = gt_cnt_read,
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},
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{ .name = "CNTVCT", .cp = 15, .crm = 14, .opc1 = 1,
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.access = PL0_R, .type = ARM_CP_64BIT | ARM_CP_NO_RAW | ARM_CP_IO,
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@ -1448,8 +1447,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
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{ .name = "CNTVCT_EL0", .state = ARM_CP_STATE_AA64,
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.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 0, .opc2 = 2,
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.access = PL0_R, .type = ARM_CP_NO_RAW | ARM_CP_IO,
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.accessfn = gt_vct_access,
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.readfn = gt_virt_cnt_read, .resetfn = gt_cnt_reset,
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.accessfn = gt_vct_access, .readfn = gt_virt_cnt_read,
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},
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/* Comparison value, indicating when the timer goes off */
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{ .name = "CNTP_CVAL", .cp = 15, .crm = 14, .opc1 = 2,
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