Add support for the arm breakpoint syscall
OABI arm used a software interrupt(0xef9f0001) for breakpoints. Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI. Apparently Steel Bank Common Lisp still uses the swi instruction. This is the kernel implementation: http://lxr.free-electrons.com/source/arch/arm/kernel/traps.c#L598 Signed-off-by: Hunter Laux <hunterlaux@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -29,6 +29,7 @@ struct target_pt_regs {
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#define ARM_THUMB_SYSCALL 0
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#define ARM_THUMB_SYSCALL 0
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#define ARM_NR_BASE 0xf0000
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#define ARM_NR_BASE 0xf0000
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#define ARM_NR_breakpoint (ARM_NR_BASE + 1)
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#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
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#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
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#define ARM_NR_set_tls (ARM_NR_BASE + 5)
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#define ARM_NR_set_tls (ARM_NR_BASE + 5)
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@ -806,6 +806,9 @@ void cpu_loop(CPUARMState *env)
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cpu_set_tls(env, env->regs[0]);
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cpu_set_tls(env, env->regs[0]);
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env->regs[0] = 0;
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env->regs[0] = 0;
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break;
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break;
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case ARM_NR_breakpoint:
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env->regs[15] -= env->thumb ? 2 : 4;
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goto excp_debug;
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default:
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default:
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gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
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gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
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n);
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n);
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@ -849,6 +852,7 @@ void cpu_loop(CPUARMState *env)
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}
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}
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break;
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break;
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case EXCP_DEBUG:
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case EXCP_DEBUG:
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excp_debug:
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{
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{
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int sig;
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int sig;
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