target/riscv: introduce riscv_cpu_cfg()
We're going to do changes that requires accessing the RISCVCPUConfig struct from the RISCVCPU, having access only to a CPURISCVState 'env' pointer. Add a helper to make the code easier to read. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230222185205.355361-2-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -654,6 +654,11 @@ static inline RISCVMXL riscv_cpu_mxl(CPURISCVState *env)
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#endif
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#endif
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#define riscv_cpu_mxl_bits(env) (1UL << (4 + riscv_cpu_mxl(env)))
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#define riscv_cpu_mxl_bits(env) (1UL << (4 + riscv_cpu_mxl(env)))
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static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURISCVState *env)
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{
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return &env_archcpu(env)->cfg;
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}
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#if defined(TARGET_RISCV32)
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#if defined(TARGET_RISCV32)
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#define cpu_recompute_xl(env) ((void)(env), MXL_RV32)
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#define cpu_recompute_xl(env) ((void)(env), MXL_RV32)
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#else
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#else
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