* target/i386: Introduce SapphireRapids-v3 to add missing features

* switch boards to "default y"
 * allow building emulators without any board
 * configs: list "implied" device groups in the default configs
 * remove unnecessary declarations from typedefs.h
 * target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386: Introduce SapphireRapids-v3 to add missing features
* switch boards to "default y"
* allow building emulators without any board
* configs: list "implied" device groups in the default configs
* remove unnecessary declarations from typedefs.h
* target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK

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# gpg: Signature made Fri 03 May 2024 10:36:59 AM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits)
  qga/commands-posix: fix typo in qmp_guest_set_user_password
  migration: do not include coroutine_int.h
  kvm: move target-dependent interrupt routing out of kvm-all.c
  pci: remove some types from typedefs.h
  tcg: remove CPU* types from typedefs.h
  display: remove GraphicHwOps from typedefs.h
  qapi/machine: remove types from typedefs.h
  monitor: remove MonitorDef from typedefs.h
  migration: remove PostcopyDiscardState from typedefs.h
  lockable: remove QemuLockable from typedefs.h
  intc: remove PICCommonState from typedefs.h
  qemu-option: remove QemuOpt from typedefs.h
  net: remove AnnounceTimer from typedefs.h
  numa: remove types from typedefs.h
  qdev-core: remove DeviceListener from typedefs.h
  fw_cfg: remove useless declarations from typedefs.h
  build: do not build virtio-vga-gl if virgl/opengl not available
  bitmap: Use g_try_new0/g_new0/g_renew
  target/i386: Introduce SapphireRapids-v3 to add missing features
  docs: document new convention for Kconfig board symbols
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-05-06 08:34:33 -07:00
commit d4c453f648
84 changed files with 455 additions and 280 deletions

View File

@ -648,6 +648,9 @@ build-tci:
- make check-tcg
# Check our reduced build configurations
# requires libfdt: aarch64, arm, i386, loongarch64, microblaze, microblazeel,
# mips64el, or1k, ppc, ppc64, riscv32, riscv64, rx, x86_64
# does not build without boards: i386, loongarch64, s390x, sh4, sh4eb, x86_64
build-without-defaults:
extends: .native_build_job_template
needs:
@ -661,8 +664,10 @@ build-without-defaults:
--disable-pie
--disable-qom-cast-debug
--disable-strip
TARGETS: avr-softmmu s390x-softmmu sh4-softmmu
sparc64-softmmu hexagon-linux-user i386-linux-user s390x-linux-user
TARGETS: alpha-softmmu avr-softmmu cris-softmmu hppa-softmmu m68k-softmmu
mips-softmmu mips64-softmmu mipsel-softmmu sparc-softmmu
sparc64-softmmu tricore-softmmu xtensa-softmmu xtensaeb-softmmu
hexagon-linux-user i386-linux-user s390x-linux-user
MAKE_CHECK_ARGS: check
build-libvhost-user:

View File

@ -24,10 +24,7 @@ msys2-64bit:
# changed to compile QEMU with the --without-default-devices switch
# for this job, because otherwise the build could not complete within
# the project timeout.
CONFIGURE_ARGS: --target-list=x86_64-softmmu --without-default-devices -Ddebug=false -Doptimization=0
# qTests don't run successfully with "--without-default-devices",
# so let's exclude the qtests from CI for now.
TEST_ARGS: --no-suite qtest
CONFIGURE_ARGS: --target-list=sparc-softmmu --without-default-devices -Ddebug=false -Doptimization=0
# The Windows git is a bit older so override the default
GIT_FETCH_EXTRA_FLAGS: --no-tags --prune --quiet
artifacts:

View File

@ -1909,8 +1909,8 @@ void kvm_irqchip_commit_routes(KVMState *s)
assert(ret == 0);
}
static void kvm_add_routing_entry(KVMState *s,
struct kvm_irq_routing_entry *entry)
void kvm_add_routing_entry(KVMState *s,
struct kvm_irq_routing_entry *entry)
{
struct kvm_irq_routing_entry *new;
int n, size;
@ -2007,7 +2007,7 @@ void kvm_irqchip_change_notify(void)
notifier_list_notify(&kvm_irqchip_change_notifiers, NULL);
}
static int kvm_irqchip_get_virq(KVMState *s)
int kvm_irqchip_get_virq(KVMState *s)
{
int next_virq;
@ -2165,62 +2165,6 @@ static int kvm_irqchip_assign_irqfd(KVMState *s, EventNotifier *event,
return kvm_vm_ioctl(s, KVM_IRQFD, &irqfd);
}
int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter)
{
struct kvm_irq_routing_entry kroute = {};
int virq;
if (!kvm_gsi_routing_enabled()) {
return -ENOSYS;
}
virq = kvm_irqchip_get_virq(s);
if (virq < 0) {
return virq;
}
kroute.gsi = virq;
kroute.type = KVM_IRQ_ROUTING_S390_ADAPTER;
kroute.flags = 0;
kroute.u.adapter.summary_addr = adapter->summary_addr;
kroute.u.adapter.ind_addr = adapter->ind_addr;
kroute.u.adapter.summary_offset = adapter->summary_offset;
kroute.u.adapter.ind_offset = adapter->ind_offset;
kroute.u.adapter.adapter_id = adapter->adapter_id;
kvm_add_routing_entry(s, &kroute);
return virq;
}
int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint)
{
struct kvm_irq_routing_entry kroute = {};
int virq;
if (!kvm_gsi_routing_enabled()) {
return -ENOSYS;
}
if (!kvm_check_extension(s, KVM_CAP_HYPERV_SYNIC)) {
return -ENOSYS;
}
virq = kvm_irqchip_get_virq(s);
if (virq < 0) {
return virq;
}
kroute.gsi = virq;
kroute.type = KVM_IRQ_ROUTING_HV_SINT;
kroute.flags = 0;
kroute.u.hv_sint.vcpu = vcpu;
kroute.u.hv_sint.sint = sint;
kvm_add_routing_entry(s, &kroute);
kvm_irqchip_commit_routes(s);
return virq;
}
#else /* !KVM_CAP_IRQ_ROUTING */
void kvm_init_irq_routing(KVMState *s)

View File

@ -22,12 +22,12 @@
* non-NULL value of 'tb'. Strictly speaking pc is only needed for
* CF_PCREL, but it's used always for simplicity.
*/
struct CPUJumpCache {
typedef struct CPUJumpCache {
struct rcu_head rcu;
struct {
TranslationBlock *tb;
vaddr pc;
} array[TB_JMP_CACHE_SIZE];
};
} CPUJumpCache;
#endif /* ACCEL_TCG_TB_JMP_CACHE_H */

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@ -5,6 +5,5 @@
#CONFIG_PCI_DEVICES=n
#CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_DP264=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_DP264=n

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@ -1,9 +1,12 @@
# Default configuration for arm-softmmu
# Uncomment the following lines to disable these optional devices:
# CONFIG_I2C_DEVICES=n
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
CONFIG_ARM_VIRT=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_ARM_VIRT=n
# These are selected by default when TCG is enabled, uncomment them to
# keep out of the build.

View File

@ -1,5 +1,4 @@
# Default configuration for avr-softmmu
# Boards:
#
CONFIG_ARDUINO=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_ARDUINO=n

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@ -1,5 +1,4 @@
# Default configuration for cris-softmmu
# Boards:
#
CONFIG_AXIS=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_AXIS=n

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@ -4,6 +4,5 @@
#
#CONFIG_PCI_DEVICES=n
# Boards:
#
CONFIG_HPPA_B160L=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_HPPA_B160L=n

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@ -24,9 +24,8 @@
#CONFIG_VTD=n
#CONFIG_SGX=n
# Boards:
#
CONFIG_ISAPC=y
CONFIG_I440FX=y
CONFIG_Q35=y
CONFIG_MICROVM=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_ISAPC=n
# CONFIG_I440FX=n
# CONFIG_Q35=n
# CONFIG_MICROVM=n

View File

@ -1,3 +1,7 @@
# Default configuration for loongarch64-softmmu
CONFIG_LOONGARCH_VIRT=y
# Uncomment the following lines to disable these optional devices:
# CONFIG_PCI_DEVICES=n
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_LOONGARCH_VIRT=n

View File

@ -1,9 +1,8 @@
# Default configuration for m68k-softmmu
# Boards:
#
CONFIG_AN5206=y
CONFIG_MCF5208=y
CONFIG_NEXTCUBE=y
CONFIG_Q800=y
CONFIG_M68K_VIRT=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_AN5206=n
# CONFIG_MCF5208=n
# CONFIG_NEXTCUBE=n
# CONFIG_Q800=n
# CONFIG_M68K_VIRT=n

View File

@ -1,7 +1,6 @@
# Default configuration for microblaze-softmmu
# Boards:
#
CONFIG_PETALOGIX_S3ADSP1800=y
CONFIG_PETALOGIX_ML605=y
CONFIG_XLNX_ZYNQMP_PMU=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_PETALOGIX_S3ADSP1800=n
# CONFIG_PETALOGIX_ML605=n
# CONFIG_XLNX_ZYNQMP_PMU=n

View File

@ -4,5 +4,6 @@
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
CONFIG_MALTA=y
CONFIG_MIPSSIM=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_MALTA=n
# CONFIG_MIPSSIM=n

View File

@ -1,4 +1,6 @@
# Default configuration for mips64-softmmu
include ../mips-softmmu/common.mak
CONFIG_JAZZ=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_JAZZ=n

View File

@ -1,7 +1,9 @@
# Default configuration for mips64el-softmmu
include ../mips-softmmu/common.mak
CONFIG_FULOONG=y
CONFIG_LOONGSON3V=y
CONFIG_JAZZ=y
CONFIG_MIPS_BOSTON=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_FULOONG=n
# CONFIG_LOONGSON3V=n
# CONFIG_JAZZ=n
# CONFIG_MIPS_BOSTON=n

View File

@ -1,6 +1,9 @@
# Default configuration for or1k-softmmu
# Uncomment the following lines to disable these optional devices:
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_OR1K_SIM=y
CONFIG_OR1K_VIRT=y
# CONFIG_OR1K_SIM=n
# CONFIG_OR1K_VIRT=n

View File

@ -1,21 +1,27 @@
# Default configuration for ppc-softmmu
# For embedded PPCs:
CONFIG_E500PLAT=y
CONFIG_MPC8544DS=y
CONFIG_PPC405=y
CONFIG_PPC440=y
CONFIG_VIRTEX=y
# Uncomment the following lines to disable these optional devices:
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
# Boards are selected by default, uncomment to keep out of the build.
# Embedded PPCs:
# CONFIG_E500PLAT=n
# CONFIG_MPC8544DS=n
# CONFIG_PPC405=n
# CONFIG_PPC440=n
# CONFIG_VIRTEX=n
# For Sam460ex
CONFIG_SAM460EX=y
# CONFIG_SAM460EX=n
# For Macs
CONFIG_MAC_OLDWORLD=y
CONFIG_MAC_NEWWORLD=y
# CONFIG_MAC_OLDWORLD=n
# CONFIG_MAC_NEWWORLD=n
CONFIG_AMIGAONE=y
CONFIG_PEGASOS2=y
# CONFIG_AMIGAONE=n
# CONFIG_PEGASOS2=n
# For PReP
CONFIG_PREP=y
# CONFIG_PREP=n

View File

@ -3,8 +3,6 @@
# Include all 32-bit boards
include ../ppc-softmmu/default.mak
# For PowerNV
CONFIG_POWERNV=y
# For pSeries
CONFIG_PSERIES=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_POWERNV=n
# CONFIG_PSERIES=n

View File

@ -1,13 +1,12 @@
# Default configuration for riscv32-softmmu
# Uncomment the following lines to disable these optional devices:
#
#CONFIG_PCI_DEVICES=n
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_SPIKE=y
CONFIG_SIFIVE_E=y
CONFIG_SIFIVE_U=y
CONFIG_RISCV_VIRT=y
CONFIG_OPENTITAN=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_SPIKE=n
# CONFIG_SIFIVE_E=n
# CONFIG_SIFIVE_U=n
# CONFIG_RISCV_VIRT=n
# CONFIG_OPENTITAN=n

View File

@ -1,14 +1,13 @@
# Default configuration for riscv64-softmmu
# Uncomment the following lines to disable these optional devices:
#
#CONFIG_PCI_DEVICES=n
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_SPIKE=y
CONFIG_SIFIVE_E=y
CONFIG_SIFIVE_U=y
CONFIG_RISCV_VIRT=y
CONFIG_MICROCHIP_PFSOC=y
CONFIG_SHAKTI_C=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_SPIKE=n
# CONFIG_SIFIVE_E=n
# CONFIG_SIFIVE_U=n
# CONFIG_RISCV_VIRT=n
# CONFIG_MICROCHIP_PFSOC=n
# CONFIG_SHAKTI_C=n

View File

@ -1,3 +1,4 @@
# Default configuration for rx-softmmu
CONFIG_RX_GDBSIM=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_RX_GDBSIM=n

View File

@ -9,6 +9,5 @@
#CONFIG_WDT_DIAG288=n
#CONFIG_PCIE_DEVICES=n
# Boards:
#
CONFIG_S390_CCW_VIRTIO=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_S390_CCW_VIRTIO=n

View File

@ -5,7 +5,6 @@
#CONFIG_PCI_DEVICES=n
#CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_R2D=y
CONFIG_SHIX=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_R2D=n
# CONFIG_SHIX=n

View File

@ -5,7 +5,6 @@
#CONFIG_TCX=n
#CONFIG_CG3=n
# Boards:
#
CONFIG_SUN4M=y
CONFIG_LEON3=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_SUN4M=n
# CONFIG_LEON3=n

View File

@ -6,7 +6,6 @@
#CONFIG_SUNHME=n
#CONFIG_TEST_DEVICES=n
# Boards:
#
CONFIG_SUN4U=y
CONFIG_NIAGARA=y
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_SUN4U=n
# CONFIG_NIAGARA=n

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@ -1,2 +1,5 @@
CONFIG_TRICORE_TESTBOARD=y
CONFIG_TRIBOARD=y
# Default configuration for tricore-softmmu
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_TRICORE_TESTBOARD=n
# CONFIG_TRIBOARD=n

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@ -1,7 +1,10 @@
# Default configuration for Xtensa
# Boards:
# Uncomment the following lines to disable these optional devices:
#
CONFIG_XTENSA_SIM=y
CONFIG_XTENSA_VIRT=y
CONFIG_XTENSA_XTFPGA=y
#CONFIG_PCI_DEVICES=n
# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_XTENSA_SIM=n
# CONFIG_XTENSA_VIRT=n
# CONFIG_XTENSA_XTFPGA=n

View File

@ -211,6 +211,8 @@ declares its dependencies in different ways:
config SUN4M
bool
default y
depends on SPARC && !SPARC64
imply TCX
imply CG3
select CS4231
@ -228,8 +230,16 @@ declares its dependencies in different ways:
directives. A device should be listed under ``select`` if the board
cannot be started at all without it. It should be listed under
``imply`` if (depending on the QEMU command line) the board may or
may not be started without it. Boards also default to false; they are
enabled by the ``default-configs/*.mak`` for the target they apply to.
may not be started without it. Boards default to true, but also
have a ``depends on`` clause to limit them to the appropriate targets.
For some targets, not all boards may be supported by hardware
virtualization, in which case they also depend on the ``TCG`` symbol,
Other symbols that are commonly used as dependencies for boards
include libraries (such as ``FDT``) or ``TARGET_BIG_ENDIAN``
(possibly negated).
Boards are listed for convenience in the ``default-configs/*.mak``
for the target they apply to.
**internal elements**

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@ -1,5 +1,7 @@
config DP264
bool
default y
depends on ALPHA
imply PCI_DEVICES
imply TEST_DEVICES
imply E1000_PCI

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@ -1,5 +1,7 @@
config ARM_VIRT
bool
default y
depends on ARM
imply PCI_DEVICES
imply TEST_DEVICES
imply VFIO_AMD_XGBE

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@ -5,5 +5,8 @@ config AVR_ATMEGA_MCU
select AVR_POWER
config ARDUINO
bool
default y
depends on AVR
select AVR_ATMEGA_MCU
select UNIMP

View File

@ -1,5 +1,7 @@
config AXIS
bool
default y
depends on CRIS
select ETRAXFS
select PFLASH_CFI02
select NAND

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@ -125,12 +125,14 @@ if config_all_devices.has_key('CONFIG_VIRTIO_VGA')
if_false: files('acpi-vga-stub.c'))
hw_display_modules += {'virtio-vga': virtio_vga_ss}
virtio_vga_gl_ss = ss.source_set()
virtio_vga_gl_ss.add(when: ['CONFIG_VIRTIO_VGA', virgl, opengl],
if_true: [files('virtio-vga-gl.c'), pixman])
virtio_vga_gl_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
if_false: files('acpi-vga-stub.c'))
hw_display_modules += {'virtio-vga-gl': virtio_vga_gl_ss}
if virgl.found() and opengl.found()
virtio_vga_gl_ss = ss.source_set()
virtio_vga_gl_ss.add(when: ['CONFIG_VIRTIO_VGA', virgl, opengl],
if_true: [files('virtio-vga-gl.c'), pixman])
virtio_vga_gl_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
if_false: files('acpi-vga-stub.c'))
hw_display_modules += {'virtio-vga-gl': virtio_vga_gl_ss}
endif
if rutabaga.found()
virtio_vga_rutabaga_ss = ss.source_set()

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@ -25,6 +25,7 @@
#ifndef HW_VGA_INT_H
#define HW_VGA_INT_H
#include "ui/console.h"
#include "exec/ioport.h"
#include "exec/memory.h"

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@ -1,5 +1,7 @@
config HPPA_B160L
bool
default y
depends on HPPA
imply PCI_DEVICES
imply E1000_PCI
imply USB_OHCI_PCI

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@ -373,6 +373,31 @@ int hyperv_set_event_flag(HvSintRoute *sint_route, unsigned eventno)
return ret;
}
static int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint)
{
struct kvm_irq_routing_entry kroute = {};
int virq;
if (!kvm_gsi_routing_enabled()) {
return -ENOSYS;
}
virq = kvm_irqchip_get_virq(s);
if (virq < 0) {
return virq;
}
kroute.gsi = virq;
kroute.type = KVM_IRQ_ROUTING_HV_SINT;
kroute.flags = 0;
kroute.u.hv_sint.vcpu = vcpu;
kroute.u.hv_sint.sint = sint;
kvm_add_routing_entry(s, &kroute);
kvm_irqchip_commit_routes(s);
return virq;
}
HvSintRoute *hyperv_sint_route_new(uint32_t vp_index, uint32_t sint,
HvSintMsgCb cb, void *cb_data)
{

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@ -66,6 +66,8 @@ config PC_ACPI
config I440FX
bool
default y
depends on I386
imply E1000_PCI
imply VMPORT
imply VMMOUSE
@ -81,6 +83,8 @@ config I440FX
config ISAPC
bool
default y
depends on I386
imply VGA_ISA
select ISA_BUS
select PC
@ -91,6 +95,8 @@ config ISAPC
config Q35
bool
default y
depends on I386
imply VTD
imply AMD_IOMMU
imply E1000E_PCI_EXPRESS
@ -108,6 +114,8 @@ config Q35
config MICROVM
bool
default y
depends on I386
select SERIAL_ISA # for serial_hds_isa_init()
select ISA_BUS
select APIC
@ -142,4 +150,4 @@ config VMMOUSE
config XEN_EMU
bool
default y
depends on KVM && (I386 || X86_64)
depends on KVM && I386

View File

@ -324,6 +324,34 @@ static int kvm_s390_io_adapter_map(S390FLICState *fs, uint32_t id,
return r ? -errno : 0;
}
static int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter)
{
struct kvm_irq_routing_entry kroute = {};
int virq;
if (!kvm_gsi_routing_enabled()) {
return -ENOSYS;
}
virq = kvm_irqchip_get_virq(s);
if (virq < 0) {
return virq;
}
kroute.gsi = virq;
kroute.type = KVM_IRQ_ROUTING_S390_ADAPTER;
kroute.flags = 0;
kroute.u.adapter.summary_addr = adapter->summary_addr;
kroute.u.adapter.ind_addr = adapter->ind_addr;
kroute.u.adapter.summary_offset = adapter->summary_offset;
kroute.u.adapter.ind_offset = adapter->ind_offset;
kroute.u.adapter.adapter_id = adapter->adapter_id;
kvm_add_routing_entry(s, &kroute);
return virq;
}
static int kvm_s390_add_adapter_routes(S390FLICState *fs,
AdapterRoutes *routes)
{

View File

@ -1,5 +1,7 @@
config LOONGARCH_VIRT
bool
default y
depends on LOONGARCH64
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
imply VIRTIO_VGA

View File

@ -1,20 +1,28 @@
config AN5206
bool
default y
depends on M68K
select COLDFIRE
select PTIMER
config MCF5208
bool
default y
depends on M68K
select COLDFIRE
select PTIMER
config NEXTCUBE
bool
default y
depends on M68K
select FRAMEBUFFER
select ESCC
config Q800
bool
default y
depends on M68K
select MAC_VIA
select NUBUS
select MACFB
@ -29,6 +37,8 @@ config Q800
config M68K_VIRT
bool
default y
depends on M68K
select M68K_IRQC
select VIRT_CTRL
select GOLDFISH_PIC

View File

@ -1,5 +1,7 @@
config PETALOGIX_S3ADSP1800
bool
default y
depends on MICROBLAZE
select PFLASH_CFI01
select XILINX
select XILINX_AXI
@ -8,6 +10,8 @@ config PETALOGIX_S3ADSP1800
config PETALOGIX_ML605
bool
default y
depends on MICROBLAZE
select PFLASH_CFI01
select SERIAL
select SSI_M25P80
@ -18,4 +22,6 @@ config PETALOGIX_ML605
config XLNX_ZYNQMP_PMU
bool
default y
depends on MICROBLAZE
select XLNX_ZYNQMP

View File

@ -1,5 +1,7 @@
config MALTA
bool
default y
depends on MIPS
imply PCNET_PCI
imply PCI_DEVICES
imply TEST_DEVICES
@ -13,11 +15,15 @@ config MALTA
config MIPSSIM
bool
default y
depends on MIPS
select SERIAL
select MIPSNET
config JAZZ
bool
default y
depends on MIPS64
select ISA_BUS
select RC4030
select I8259
@ -38,6 +44,8 @@ config JAZZ
config FULOONG
bool
default y
depends on MIPS64 && !TARGET_BIG_ENDIAN
imply PCI_DEVICES
imply TEST_DEVICES
imply ATI_VGA
@ -48,6 +56,8 @@ config FULOONG
config LOONGSON3V
bool
default y
depends on MIPS64 && !TARGET_BIG_ENDIAN
imply PCI_DEVICES
imply TEST_DEVICES
imply VIRTIO_PCI
@ -69,6 +79,8 @@ config MIPS_CPS
config MIPS_BOSTON
bool
default y
depends on MIPS64 && !TARGET_BIG_ENDIAN
imply PCI_DEVICES
imply TEST_DEVICES
select FITLOADER

View File

@ -1,5 +1,7 @@
config OR1K_SIM
bool
default y
depends on OPENRISC
select SERIAL
select OPENCORES_ETH
select OMPIC
@ -7,6 +9,8 @@ config OR1K_SIM
config OR1K_VIRT
bool
default y
depends on OPENRISC
imply PCI_DEVICES
imply VIRTIO_VGA
imply TEST_DEVICES

View File

@ -1,5 +1,7 @@
config PSERIES
bool
default y
depends on PPC64
imply USB_OHCI_PCI
imply PCI_DEVICES
imply TEST_DEVICES
@ -23,6 +25,8 @@ config SPAPR_RNG
config POWERNV
bool
default y
depends on PPC64
imply PCI_DEVICES
imply TEST_DEVICES
select ISA_IPMI_BT
@ -38,6 +42,8 @@ config POWERNV
config PPC405
bool
default y
depends on PPC
select M48T59
select PFLASH_CFI02
select PPC4XX
@ -45,6 +51,8 @@ config PPC405
config PPC440
bool
default y
depends on PPC
imply PCI_DEVICES
imply TEST_DEVICES
imply E1000_PCI
@ -62,6 +70,8 @@ config PPC4XX
config SAM460EX
bool
default y
depends on PPC
select PFLASH_CFI01
select IDE_SII3112
select M41T80
@ -75,6 +85,8 @@ config SAM460EX
config AMIGAONE
bool
default y
depends on PPC
imply ATI_VGA
select ARTICIA
select VT82C686
@ -82,6 +94,8 @@ config AMIGAONE
config PEGASOS2
bool
default y
depends on PPC
imply ATI_VGA
select MV64361
select VT82C686
@ -90,6 +104,8 @@ config PEGASOS2
config PREP
bool
default y
depends on PPC
imply PCI_DEVICES
imply TEST_DEVICES
select CS4231A
@ -106,6 +122,8 @@ config RS6000_MC
config MAC_OLDWORLD
bool
default y
depends on PPC
imply PCI_DEVICES
imply SUNGEM
imply TEST_DEVICES
@ -117,6 +135,8 @@ config MAC_OLDWORLD
config MAC_NEWWORLD
bool
default y
depends on PPC
imply PCI_DEVICES
imply SUNGEM
imply TEST_DEVICES
@ -147,14 +167,20 @@ config E500
config E500PLAT
bool
default y
depends on PPC
select E500
config MPC8544DS
bool
default y
depends on PPC
select E500
config VIRTEX
bool
default y
depends on PPC
select PPC4XX
select PFLASH_CFI01
select SERIAL

View File

@ -8,6 +8,8 @@ config IBEX
config MICROCHIP_PFSOC
bool
default y
depends on RISCV64
select CADENCE_SDHCI
select CPU_CLUSTER
select MCHP_PFSOC_DMC
@ -21,12 +23,16 @@ config MICROCHIP_PFSOC
config OPENTITAN
bool
default y
depends on RISCV32
select IBEX
select SIFIVE_PLIC
select UNIMP
config RISCV_VIRT
bool
default y
depends on RISCV32 || RISCV64
imply PCI_DEVICES
imply VIRTIO_VGA
imply TEST_DEVICES
@ -51,6 +57,8 @@ config RISCV_VIRT
config SHAKTI_C
bool
default y
depends on RISCV64
select RISCV_ACLINT
select SHAKTI_UART
select SIFIVE_PLIC
@ -58,6 +66,8 @@ config SHAKTI_C
config SIFIVE_E
bool
default y
depends on RISCV32 || RISCV64
select RISCV_ACLINT
select SIFIVE_GPIO
select SIFIVE_PLIC
@ -68,6 +78,8 @@ config SIFIVE_E
config SIFIVE_U
bool
default y
depends on RISCV32 || RISCV64
select CADENCE
select CPU_CLUSTER
select RISCV_ACLINT
@ -85,6 +97,8 @@ config SIFIVE_U
config SPIKE
bool
default y
depends on RISCV32 || RISCV64
select RISCV_NUMA
select HTIF
select RISCV_ACLINT

View File

@ -7,4 +7,6 @@ config RX62N_MCU
config RX_GDBSIM
bool
default y
depends on RX
select RX62N_MCU

View File

@ -1,5 +1,7 @@
config S390_CCW_VIRTIO
bool
default y
depends on S390X
imply VIRTIO_PCI
imply TERMINAL3270
imply VFIO_AP

View File

@ -1,5 +1,7 @@
config R2D
bool
default y
depends on SH4
imply PCI_DEVICES
imply TEST_DEVICES
imply RTL8139_PCI
@ -13,6 +15,8 @@ config R2D
config SHIX
bool
default y
depends on SH4
select SH7750
select TC58128

View File

@ -1,5 +1,7 @@
config SUN4M
bool
default y
depends on SPARC && !SPARC64
imply TCX
imply CG3
select CS4231
@ -18,6 +20,8 @@ config SUN4M
config LEON3
bool
default y
depends on SPARC && !SPARC64
select GRLIB
config GRLIB

View File

@ -1,5 +1,7 @@
config SUN4U
bool
default y
depends on SPARC64
imply PCI_DEVICES
imply SUNHME
imply TEST_DEVICES
@ -16,6 +18,8 @@ config SUN4U
config NIAGARA
bool
default y
depends on SPARC64
select EMPTY_SLOT
select SUN4V_RTC
select UNIMP

View File

@ -1,8 +1,12 @@
config TRICORE_TESTBOARD
default y
depends on TRICORE
bool
config TRIBOARD
bool
default y
depends on TRICORE
select TC27X_SOC
config TC27X_SOC

View File

@ -1,14 +1,20 @@
config XTENSA_SIM
default y
depends on XTENSA
bool
config XTENSA_VIRT
bool
default y
depends on XTENSA
select XTENSA_SIM
select PCI_EXPRESS_GENERIC_BRIDGE
select PCI_DEVICES
config XTENSA_XTFPGA
bool
default y
depends on XTENSA
select OPENCORES_ETH
select PFLASH_CFI01
select SERIAL

View File

@ -28,6 +28,7 @@
#include "exec/memattrs.h"
#include "exec/mmu-access-type.h"
#include "exec/tlb-common.h"
#include "qapi/qapi-types-machine.h"
#include "qapi/qapi-types-run-state.h"
#include "qemu/bitmap.h"
#include "qemu/rcu_queue.h"
@ -84,6 +85,12 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU,
typedef struct CPUWatchpoint CPUWatchpoint;
/* see physmem.c */
struct CPUAddressSpace;
/* see accel/tcg/tb-jmp-cache.h */
struct CPUJumpCache;
/* see accel-cpu.h */
struct AccelCPUClass;
@ -472,12 +479,12 @@ struct CPUState {
QemuMutex work_mutex;
QSIMPLEQ_HEAD(, qemu_work_item) work_list;
CPUAddressSpace *cpu_ases;
struct CPUAddressSpace *cpu_ases;
int num_ases;
AddressSpace *as;
MemoryRegion *memory;
CPUJumpCache *tb_jmp_cache;
struct CPUJumpCache *tb_jmp_cache;
GArray *gdb_regs;
int gdb_num_regs;

View File

@ -3,6 +3,8 @@
/* i8259.c */
typedef struct PICCommonState PICCommonState;
extern PICCommonState *isa_pic;
/*

View File

@ -59,6 +59,8 @@ typedef struct fw_cfg_dma_access FWCfgDmaAccess;
typedef void (*FWCfgCallback)(void *opaque);
typedef void (*FWCfgWriteCallback)(void *opaque, off_t start, size_t len);
typedef struct FWCfgEntry FWCfgEntry;
struct FWCfgState {
/*< private >*/
SysBusDevice parent_obj;

View File

@ -27,6 +27,9 @@
#include "hw/pci/pcie_sriov.h"
#include "hw/hotplug.h"
typedef struct PCIEPort PCIEPort;
typedef struct PCIESlot PCIESlot;
typedef enum {
/* these bits must match the bits in Slot Control/Status registers.
* PCI_EXP_HP_EV_xxx = PCI_EXP_SLTCTL_xxxE = PCI_EXP_SLTSTA_xxx

View File

@ -25,8 +25,23 @@
/* definitions which PCIExpressDevice uses */
/* error */
typedef struct PCIEAERErr {
uint32_t status; /* error status bits */
uint16_t source_id; /* bdf */
#define PCIE_AER_ERR_IS_CORRECTABLE 0x1 /* correctable/uncorrectable */
#define PCIE_AER_ERR_MAYBE_ADVISORY 0x2 /* maybe advisory non-fatal */
#define PCIE_AER_ERR_HEADER_VALID 0x4 /* TLP header is logged */
#define PCIE_AER_ERR_TLP_PREFIX_PRESENT 0x8 /* TLP Prefix is logged */
uint16_t flags;
uint32_t header[4]; /* TLP header */
uint32_t prefix[4]; /* TLP header prefix */
} PCIEAERErr;
/* AER log */
struct PCIEAERLog {
typedef struct PCIEAERLog {
/* This structure is saved/loaded.
So explicitly size them instead of unsigned int */
@ -48,11 +63,11 @@ struct PCIEAERLog {
/* Error log. log_max-sized array */
PCIEAERErr *log;
};
} PCIEAERLog;
/* aer error message: error signaling message has only error severity and
source id. See 2.2.8.3 error signaling messages */
struct PCIEAERMsg {
typedef struct PCIEAERMsg {
/*
* PCI_ERR_ROOT_CMD_{COR, NONFATAL, FATAL}_EN
* = PCI_EXP_DEVCTL_{CERE, NFERE, FERE}
@ -60,7 +75,7 @@ struct PCIEAERMsg {
uint32_t severity;
uint16_t source_id; /* bdf */
};
} PCIEAERMsg;
static inline bool
pcie_aer_msg_is_uncor(const PCIEAERMsg *msg)
@ -69,21 +84,6 @@ pcie_aer_msg_is_uncor(const PCIEAERMsg *msg)
msg->severity == PCI_ERR_ROOT_CMD_FATAL_EN;
}
/* error */
struct PCIEAERErr {
uint32_t status; /* error status bits */
uint16_t source_id; /* bdf */
#define PCIE_AER_ERR_IS_CORRECTABLE 0x1 /* correctable/uncorrectable */
#define PCIE_AER_ERR_MAYBE_ADVISORY 0x2 /* maybe advisory non-fatal */
#define PCIE_AER_ERR_HEADER_VALID 0x4 /* TLP header is logged */
#define PCIE_AER_ERR_TLP_PREFIX_PRESENT 0x8 /* TLP Prefix is logged */
uint16_t flags;
uint32_t header[4]; /* TLP header */
uint32_t prefix[4]; /* TLP header prefix */
};
extern const VMStateDescription vmstate_pcie_aer_log;
int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,

View File

@ -15,17 +15,17 @@
#include "hw/pci/pci.h"
struct PCIESriovPF {
typedef struct PCIESriovPF {
uint16_t num_vfs; /* Number of virtual functions created */
uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */
const char *vfname; /* Reference to the device type used for the VFs */
PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */
};
} PCIESriovPF;
struct PCIESriovVF {
typedef struct PCIESriovVF {
PCIDevice *pf; /* Pointer back to owner physical function */
uint16_t vf_number; /* Logical VF number of this function */
};
} PCIESriovVF;
void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
const char *vfname, uint16_t vf_dev_id,

View File

@ -294,6 +294,7 @@ struct DeviceState {
MemReentrancyGuard mem_reentrancy_guard;
};
typedef struct DeviceListener DeviceListener;
struct DeviceListener {
void (*realize)(DeviceListener *listener, DeviceState *dev);
void (*unrealize)(DeviceListener *listener, DeviceState *dev);

View File

@ -12,12 +12,12 @@
#ifndef S390X_ADAPTER_H
#define S390X_ADAPTER_H
struct AdapterInfo {
typedef struct AdapterInfo {
uint64_t ind_addr;
uint64_t summary_addr;
uint64_t ind_offset;
uint32_t summary_offset;
uint32_t adapter_id;
};
} AdapterInfo;
#endif

View File

@ -25,11 +25,10 @@
#ifndef MONITOR_HMP_TARGET_H
#define MONITOR_HMP_TARGET_H
typedef struct MonitorDef MonitorDef;
#ifdef COMPILING_PER_TARGET
#include "cpu.h"
#define MD_TLONG 0
#define MD_I32 1
struct MonitorDef {
const char *name;
int offset;
@ -37,6 +36,10 @@ struct MonitorDef {
int val);
int type;
};
#endif
#define MD_TLONG 0
#define MD_I32 1
const MonitorDef *target_monitor_defs(void);
int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval);

View File

@ -12,12 +12,12 @@
#include "qapi/qapi-types-net.h"
#include "qemu/timer.h"
struct AnnounceTimer {
typedef struct AnnounceTimer {
QEMUTimer *tm;
AnnounceParameters params;
QEMUClockType type;
int round;
};
} AnnounceTimer;
/* Returns: update the timer to the next time point */
int64_t qemu_announce_timer_step(AnnounceTimer *timer);

View File

@ -92,17 +92,14 @@ long slow_bitmap_count_one(const unsigned long *bitmap, long nbits);
static inline unsigned long *bitmap_try_new(long nbits)
{
long len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
return g_try_malloc0(len);
long nelem = BITS_TO_LONGS(nbits);
return g_try_new0(unsigned long, nelem);
}
static inline unsigned long *bitmap_new(long nbits)
{
unsigned long *ptr = bitmap_try_new(nbits);
if (ptr == NULL) {
abort();
}
return ptr;
long nelem = BITS_TO_LONGS(nbits);
return g_new0(unsigned long, nelem);
}
static inline void bitmap_zero(unsigned long *dst, long nbits)
@ -265,10 +262,10 @@ unsigned long bitmap_find_next_zero_area(unsigned long *map,
static inline unsigned long *bitmap_zero_extend(unsigned long *old,
long old_nbits, long new_nbits)
{
long new_len = BITS_TO_LONGS(new_nbits) * sizeof(unsigned long);
unsigned long *new = g_realloc(old, new_len);
bitmap_clear(new, old_nbits, new_nbits - old_nbits);
return new;
long new_nelem = BITS_TO_LONGS(new_nbits);
unsigned long *ptr = g_renew(unsigned long, old, new_nelem);
bitmap_clear(ptr, old_nbits, new_nbits - old_nbits);
return ptr;
}
void bitmap_to_le(unsigned long *dst, const unsigned long *src,

View File

@ -84,6 +84,8 @@ static inline coroutine_fn void qemu_co_mutex_assert_locked(CoMutex *mutex)
mutex->holder == qemu_coroutine_self());
}
#include "qemu/lockable.h"
/**
* CoQueues are a mechanism to queue coroutines in order to continue executing
* them later. They are similar to condition variables, but they need help
@ -281,8 +283,6 @@ void qemu_coroutine_inc_pool_size(unsigned int additional_pool_size);
*/
void qemu_coroutine_dec_pool_size(unsigned int additional_pool_size);
#include "qemu/lockable.h"
/**
* Sends a (part of) iovec down a socket, yielding when the socket is full, or
* Receives data into a (part of) iovec from a socket,

View File

@ -18,11 +18,11 @@
typedef void QemuLockUnlockFunc(void *);
struct QemuLockable {
typedef struct QemuLockable {
void *object;
QemuLockUnlockFunc *lock;
QemuLockUnlockFunc *unlock;
};
} QemuLockable;
static inline __attribute__((__always_inline__)) QemuLockable *
qemu_make_lockable(void *x, QemuLockable *lockable)

View File

@ -54,6 +54,8 @@ enum QemuOptType {
QEMU_OPT_SIZE, /* size, accepts (K)ilo, (M)ega, (G)iga, (T)era postfix */
};
typedef struct QemuOpt QemuOpt;
typedef struct QemuOptDesc {
const char *name;
enum QemuOptType type;

View File

@ -23,11 +23,9 @@
*/
typedef struct AccelCPUState AccelCPUState;
typedef struct AccelState AccelState;
typedef struct AdapterInfo AdapterInfo;
typedef struct AddressSpace AddressSpace;
typedef struct AioContext AioContext;
typedef struct Aml Aml;
typedef struct AnnounceTimer AnnounceTimer;
typedef struct ArchCPU ArchCPU;
typedef struct BdrvDirtyBitmap BdrvDirtyBitmap;
typedef struct BdrvDirtyBitmapIter BdrvDirtyBitmapIter;
@ -38,16 +36,10 @@ typedef struct BusClass BusClass;
typedef struct BusState BusState;
typedef struct Chardev Chardev;
typedef struct Clock Clock;
typedef struct CompatProperty CompatProperty;
typedef struct ConfidentialGuestSupport ConfidentialGuestSupport;
typedef struct CPUAddressSpace CPUAddressSpace;
typedef struct CPUArchState CPUArchState;
typedef struct CPUPluginState CPUPluginState;
typedef struct CpuInfoFast CpuInfoFast;
typedef struct CPUJumpCache CPUJumpCache;
typedef struct CPUState CPUState;
typedef struct CPUTLBEntryFull CPUTLBEntryFull;
typedef struct DeviceListener DeviceListener;
typedef struct DeviceState DeviceState;
typedef struct DirtyBitmapSnapshot DirtyBitmapSnapshot;
typedef struct DisplayChangeListener DisplayChangeListener;
@ -56,11 +48,7 @@ typedef struct DumpState DumpState;
typedef struct Error Error;
typedef struct EventNotifier EventNotifier;
typedef struct FlatView FlatView;
typedef struct FWCfgEntry FWCfgEntry;
typedef struct FWCfgIoState FWCfgIoState;
typedef struct FWCfgMemState FWCfgMemState;
typedef struct FWCfgState FWCfgState;
typedef struct GraphicHwOps GraphicHwOps;
typedef struct HostMemoryBackend HostMemoryBackend;
typedef struct I2CBus I2CBus;
typedef struct I2SCodec I2SCodec;
@ -80,31 +68,21 @@ typedef struct MemoryRegionSection MemoryRegionSection;
typedef struct MigrationIncomingState MigrationIncomingState;
typedef struct MigrationState MigrationState;
typedef struct Monitor Monitor;
typedef struct MonitorDef MonitorDef;
typedef struct MSIMessage MSIMessage;
typedef struct NetClientState NetClientState;
typedef struct NetFilterState NetFilterState;
typedef struct NICInfo NICInfo;
typedef struct NodeInfo NodeInfo;
typedef struct NumaNodeMem NumaNodeMem;
typedef struct Object Object;
typedef struct ObjectClass ObjectClass;
typedef struct PCIBridge PCIBridge;
typedef struct PCIBus PCIBus;
typedef struct PCIDevice PCIDevice;
typedef struct PCIEAERErr PCIEAERErr;
typedef struct PCIEAERLog PCIEAERLog;
typedef struct PCIEAERMsg PCIEAERMsg;
typedef struct PCIEPort PCIEPort;
typedef struct PCIESlot PCIESlot;
typedef struct PCIESriovPF PCIESriovPF;
typedef struct PCIESriovVF PCIESriovVF;
typedef struct PCIExpressDevice PCIExpressDevice;
typedef struct PCIExpressHost PCIExpressHost;
typedef struct PCIHostDeviceAddress PCIHostDeviceAddress;
typedef struct PCIHostState PCIHostState;
typedef struct PICCommonState PICCommonState;
typedef struct PostcopyDiscardState PostcopyDiscardState;
typedef struct Property Property;
typedef struct PropertyInfo PropertyInfo;
typedef struct QBool QBool;
@ -113,9 +91,7 @@ typedef struct QEMUBH QEMUBH;
typedef struct QemuConsole QemuConsole;
typedef struct QEMUCursor QEMUCursor;
typedef struct QEMUFile QEMUFile;
typedef struct QemuLockable QemuLockable;
typedef struct QemuMutex QemuMutex;
typedef struct QemuOpt QemuOpt;
typedef struct QemuOpts QemuOpts;
typedef struct QemuOptsList QemuOptsList;
typedef struct QEMUSGList QEMUSGList;

View File

@ -470,10 +470,11 @@ static inline void kvm_irqchip_commit_route_changes(KVMRouteChange *c)
}
}
int kvm_irqchip_get_virq(KVMState *s);
void kvm_irqchip_release_virq(KVMState *s, int virq);
int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter);
int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint);
void kvm_add_routing_entry(KVMState *s,
struct kvm_irq_routing_entry *entry);
int kvm_irqchip_add_irqfd_notifier_gsi(KVMState *s, EventNotifier *n,
EventNotifier *rn, int virq);

View File

@ -36,7 +36,7 @@ enum {
#define UINT16_BITS 16
struct NodeInfo {
typedef struct NodeInfo {
uint64_t node_mem;
struct HostMemoryBackend *node_memdev;
bool present;
@ -45,12 +45,12 @@ struct NodeInfo {
uint8_t lb_info_provided;
uint16_t initiator;
uint8_t distance[MAX_NODES];
};
} NodeInfo;
struct NumaNodeMem {
typedef struct NumaNodeMem {
uint64_t node_mem;
uint64_t node_plugged_mem;
};
} NumaNodeMem;
struct HMAT_LB_Data {
uint8_t initiator;

View File

@ -3005,7 +3005,7 @@ foreach target : target_dirs
}
endif
accel_kconfig = []
target_kconfig = []
foreach sym: accelerators
if sym == 'CONFIG_TCG' or target in accelerator_targets.get(sym, [])
config_target += { sym: 'y' }
@ -3015,10 +3015,10 @@ foreach target : target_dirs
else
config_target += { 'CONFIG_TCG_BUILTIN': 'y' }
endif
accel_kconfig += [ sym + '=y' ]
target_kconfig += [ sym + '=y' ]
endif
endforeach
if accel_kconfig.length() == 0
if target_kconfig.length() == 0
if default_targets
continue
endif
@ -3078,6 +3078,9 @@ foreach target : target_dirs
configuration: config_target_data)}
if target.endswith('-softmmu')
target_kconfig += 'CONFIG_' + config_target['TARGET_ARCH'].to_upper() + '=y'
target_kconfig += 'CONFIG_TARGET_BIG_ENDIAN=' + config_target['TARGET_BIG_ENDIAN']
config_input = meson.get_external_property(target, 'default')
config_devices_mak = target + '-config-devices.mak'
config_devices_mak = configure_file(
@ -3088,8 +3091,7 @@ foreach target : target_dirs
command: [minikconf,
get_option('default_devices') ? '--defconfig' : '--allnoconfig',
config_devices_mak, '@DEPFILE@', '@INPUT@',
host_kconfig, accel_kconfig,
'CONFIG_' + config_target['TARGET_ARCH'].to_upper() + '=y'])
host_kconfig, target_kconfig])
config_devices_data = configuration_data()
config_devices = keyval.load(config_devices_mak)

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@ -19,7 +19,7 @@
#include "qapi/qapi-types-migration.h"
#include "qapi/qmp/json-writer.h"
#include "qemu/thread.h"
#include "qemu/coroutine_int.h"
#include "qemu/coroutine.h"
#include "io/channel.h"
#include "io/channel-buffer.h"
#include "net/announce.h"

View File

@ -44,7 +44,7 @@
*/
#define MAX_DISCARDS_PER_COMMAND 12
struct PostcopyDiscardState {
typedef struct PostcopyDiscardState {
const char *ramblock_name;
uint16_t cur_entry;
/*
@ -54,7 +54,7 @@ struct PostcopyDiscardState {
uint64_t length_list[MAX_DISCARDS_PER_COMMAND];
unsigned int nsentwords;
unsigned int nsentcmds;
};
} PostcopyDiscardState;
static NotifierWithReturnList postcopy_notifier_list;

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@ -2173,7 +2173,7 @@ void qmp_guest_set_user_password(const char *username,
}
#ifdef __FreeBSD__
g_autofree char *chpasswdata = g_strdup(rawpasswddata);
g_autofree char *chpasswddata = g_strdup(rawpasswddata);
const char *crypt_flag = crypted ? "-H" : "-h";
const char *argv[] = {"pw", "usermod", "-n", username,
crypt_flag, "0", NULL};

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@ -1,6 +1,5 @@
#include "qemu/osdep.h"
const MonitorDef *target_monitor_defs(void);
#include "monitor/hmp-target.h"
const MonitorDef *target_monitor_defs(void)
{

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@ -158,12 +158,12 @@ static void tcg_commit(MemoryListener *listener);
* @memory_dispatch: its dispatch pointer (cached, RCU protected)
* @tcg_as_listener: listener for tracking changes to the AddressSpace
*/
struct CPUAddressSpace {
typedef struct CPUAddressSpace {
CPUState *cpu;
AddressSpace *as;
struct AddressSpaceDispatch *memory_dispatch;
MemoryListener tcg_as_listener;
};
} CPUAddressSpace;
struct DirtyBitmapSnapshot {
ram_addr_t start;

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@ -17,3 +17,6 @@ source sh4/Kconfig
source sparc/Kconfig
source tricore/Kconfig
source xtensa/Kconfig
config TARGET_BIG_ENDIAN
bool

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@ -9,3 +9,5 @@ config ARM
config AARCH64
bool
select ARM
# kvm_arch_fixup_msi_route() needs to access PCIDevice
select PCI if KVM

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@ -1,5 +1,8 @@
config I386
bool
# kvm_arch_fixup_msi_route() needs to access PCIDevice
select PCI if KVM
config X86_64
bool
select I386

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@ -3970,6 +3970,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ }
}
},
{
.version = 3,
.props = (PropValue[]) {
{ "ss", "on" },
{ "tsc-adjust", "on" },
{ "cldemote", "on" },
{ "movdiri", "on" },
{ "movdir64b", "on" },
{ /* end of list */ }
}
},
{ /* end of list */ }
}
},

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@ -2798,13 +2798,17 @@ static void gen_bnd_jmp(DisasContext *s)
static void
do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr)
{
bool inhibit_reset;
gen_update_cc_op(s);
/* If several instructions disable interrupts, only the first does it. */
if (inhibit && !(s->flags & HF_INHIBIT_IRQ_MASK)) {
gen_set_hflag(s, HF_INHIBIT_IRQ_MASK);
} else {
inhibit_reset = false;
if (s->flags & HF_INHIBIT_IRQ_MASK) {
gen_reset_hflag(s, HF_INHIBIT_IRQ_MASK);
inhibit_reset = true;
} else if (inhibit) {
gen_set_hflag(s, HF_INHIBIT_IRQ_MASK);
}
if (s->base.tb->flags & HF_RF_MASK) {
@ -2815,7 +2819,9 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr)
tcg_gen_exit_tb(NULL, 0);
} else if (s->flags & HF_TF_MASK) {
gen_helper_single_step(tcg_env);
} else if (jr) {
} else if (jr &&
/* give irqs a chance to happen */
!inhibit_reset) {
tcg_gen_lookup_and_goto_ptr();
} else {
tcg_gen_exit_tb(NULL, 0);

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@ -3,3 +3,4 @@ config PPC
config PPC64
bool
select PPC

View File

@ -49,6 +49,8 @@
#include "elf.h"
#include "sysemu/kvm_int.h"
#include CONFIG_DEVICES
#define PROC_DEVTREE_CPU "/proc/device-tree/cpus/"
#define DEBUG_RETURN_GUEST 0
@ -71,7 +73,6 @@ static int cap_hior;
static int cap_one_reg;
static int cap_epr;
static int cap_ppc_watchdog;
static int cap_papr;
static int cap_htab_fd;
static int cap_fixup_hcalls;
static int cap_htm; /* Hardware transactional memory support */
@ -90,6 +91,12 @@ static int cap_fwnmi;
static int cap_rpt_invalidate;
static int cap_ail_mode_3;
#ifdef CONFIG_PSERIES
static int cap_papr;
#else
#define cap_papr (0)
#endif
static uint32_t debug_inst_opcode;
/*
@ -1668,7 +1675,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
trace_kvm_handle_halt();
ret = kvmppc_handle_halt(cpu);
break;
#if defined(TARGET_PPC64)
#if defined(CONFIG_PSERIES)
case KVM_EXIT_PAPR_HCALL:
trace_kvm_handle_papr_hcall(run->papr_hcall.nr);
run->papr_hcall.ret = spapr_hypercall(cpu,
@ -1698,7 +1705,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
ret = 0;
break;
#if defined(TARGET_PPC64)
#if defined(CONFIG_PSERIES)
case KVM_EXIT_NMI:
trace_kvm_handle_nmi_exception();
ret = kvm_handle_nmi(cpu, run);
@ -2054,6 +2061,7 @@ void kvmppc_enable_h_rpt_invalidate(void)
kvmppc_enable_hcall(kvm_state, H_RPT_INVALIDATE);
}
#ifdef CONFIG_PSERIES
void kvmppc_set_papr(PowerPCCPU *cpu)
{
CPUState *cs = CPU(cpu);
@ -2075,6 +2083,7 @@ void kvmppc_set_papr(PowerPCCPU *cpu)
*/
cap_papr = 1;
}
#endif
int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr)
{
@ -2837,7 +2846,7 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
return data & 0xffff;
}
#if defined(TARGET_PPC64)
#if defined(CONFIG_PSERIES)
int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run)
{
uint16_t flags = run->flags & KVM_RUN_PPC_NMI_DISP_MASK;

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@ -262,11 +262,12 @@ int main(int argc, char **argv)
base_setup();
g_test_init(&argc, &argv, NULL);
if (g_test_slow()) {
/* Do not run this in timing-sensitive environments */
qtest_add_func("/rtc/bcd-check-time", bcd_check_time);
if (qtest_has_machine(base_machine)) {
if (g_test_slow()) {
/* Do not run this in timing-sensitive environments */
qtest_add_func("/rtc/bcd-check-time", bcd_check_time);
}
qtest_add_func("/rtc/fuzz-registers", fuzz_registers);
}
qtest_add_func("/rtc/fuzz-registers", fuzz_registers);
return g_test_run();
}