microvm: add usb support
Wire up "usb=on" machine option, when enabled add a sysbus xhci controller with 8 ports. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201020074844.5304-6-kraxel@redhat.com
This commit is contained in:
parent
7114f6eac3
commit
d4a42e8581
@ -105,6 +105,7 @@ config MICROVM
|
||||
select VIRTIO_MMIO
|
||||
select ACPI_HW_REDUCED
|
||||
select PCI_EXPRESS_GENERIC_BRIDGE
|
||||
select USB_XHCI_SYSBUS
|
||||
|
||||
config X86_IOMMU
|
||||
bool
|
||||
|
@ -35,6 +35,7 @@
|
||||
#include "hw/i386/microvm.h"
|
||||
#include "hw/pci/pci.h"
|
||||
#include "hw/pci/pcie_host.h"
|
||||
#include "hw/usb/xhci.h"
|
||||
#include "hw/virtio/virtio-mmio.h"
|
||||
|
||||
#include "acpi-common.h"
|
||||
@ -89,6 +90,13 @@ static void acpi_dsdt_add_virtio(Aml *scope,
|
||||
}
|
||||
}
|
||||
|
||||
static void acpi_dsdt_add_xhci(Aml *scope, MicrovmMachineState *mms)
|
||||
{
|
||||
if (machine_usb(MACHINE(mms))) {
|
||||
xhci_sysbus_build_aml(scope, MICROVM_XHCI_BASE, MICROVM_XHCI_IRQ);
|
||||
}
|
||||
}
|
||||
|
||||
static void acpi_dsdt_add_pci(Aml *scope, MicrovmMachineState *mms)
|
||||
{
|
||||
if (mms->pcie != ON_OFF_AUTO_ON) {
|
||||
@ -123,6 +131,7 @@ build_dsdt_microvm(GArray *table_data, BIOSLinker *linker,
|
||||
GED_MMIO_IRQ, AML_SYSTEM_MEMORY, GED_MMIO_BASE);
|
||||
acpi_dsdt_add_power_button(sb_scope);
|
||||
acpi_dsdt_add_virtio(sb_scope, mms);
|
||||
acpi_dsdt_add_xhci(sb_scope, mms);
|
||||
acpi_dsdt_add_pci(sb_scope, mms);
|
||||
aml_append(dsdt, sb_scope);
|
||||
|
||||
|
@ -47,6 +47,7 @@
|
||||
#include "hw/acpi/acpi.h"
|
||||
#include "hw/acpi/generic_event_device.h"
|
||||
#include "hw/pci-host/gpex.h"
|
||||
#include "hw/usb/xhci.h"
|
||||
|
||||
#include "cpu.h"
|
||||
#include "elf.h"
|
||||
@ -197,6 +198,18 @@ static void microvm_devices_init(MicrovmMachineState *mms)
|
||||
x86ms->acpi_dev = HOTPLUG_HANDLER(dev);
|
||||
}
|
||||
|
||||
if (x86_machine_is_acpi_enabled(x86ms) && machine_usb(MACHINE(mms))) {
|
||||
DeviceState *dev = qdev_new(TYPE_XHCI_SYSBUS);
|
||||
qdev_prop_set_uint32(dev, "intrs", 1);
|
||||
qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS);
|
||||
qdev_prop_set_uint32(dev, "p2", 8);
|
||||
qdev_prop_set_uint32(dev, "p3", 8);
|
||||
sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
|
||||
x86ms->gsi[MICROVM_XHCI_IRQ]);
|
||||
}
|
||||
|
||||
if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) {
|
||||
/* use topmost 25% of the address space available */
|
||||
hwaddr phys_size = (hwaddr)1 << X86_CPU(first_cpu)->phys_bits;
|
||||
|
@ -41,7 +41,7 @@
|
||||
* 7 | parallel |
|
||||
* 8 | rtc | rtc (rtc=on)
|
||||
* 9 | acpi | acpi (ged)
|
||||
* 10 | pci lnk |
|
||||
* 10 | pci lnk | xhci (usb=on)
|
||||
* 11 | pci lnk |
|
||||
* 12 | ps2 | pcie
|
||||
* 13 | fpu | pcie
|
||||
@ -60,6 +60,9 @@
|
||||
#define GED_MMIO_BASE_REGS (GED_MMIO_BASE + 0x200)
|
||||
#define GED_MMIO_IRQ 9
|
||||
|
||||
#define MICROVM_XHCI_BASE 0xfe900000
|
||||
#define MICROVM_XHCI_IRQ 10
|
||||
|
||||
#define PCIE_MMIO_BASE 0xc0000000
|
||||
#define PCIE_MMIO_SIZE 0x20000000
|
||||
#define PCIE_ECAM_BASE 0xe0000000
|
||||
|
Loading…
Reference in New Issue
Block a user