vfio/pci: Cleanup RTL8168 quirk and tracing
There's quite a bit of cleanup that can be done to the RTL8168 quirk, as well as the tracing to prevent a spew of uninteresting accesses for anything else the driver might choose to use the window registers for besides the MSI-X table. There should be no functional change, but it's now possible to get compact and useful traces by enabling vfio_rtl8168_quirk*, ex: vfio_rtl8168_quirk_write 0000:04:00.0 [address]: 0x1f000 vfio_rtl8168_quirk_read 0000:04:00.0 [address]: 0x8001f000 vfio_rtl8168_quirk_read 0000:04:00.0 [data]: 0xfee0100c vfio_rtl8168_quirk_write 0000:04:00.0 [address]: 0x1f004 vfio_rtl8168_quirk_read 0000:04:00.0 [address]: 0x8001f004 vfio_rtl8168_quirk_read 0000:04:00.0 [data]: 0x0 vfio_rtl8168_quirk_write 0000:04:00.0 [address]: 0x1f008 vfio_rtl8168_quirk_read 0000:04:00.0 [address]: 0x8001f008 vfio_rtl8168_quirk_read 0000:04:00.0 [data]: 0x49b1 vfio_rtl8168_quirk_write 0000:04:00.0 [address]: 0x1f00c vfio_rtl8168_quirk_read 0000:04:00.0 [address]: 0x8001f00c vfio_rtl8168_quirk_read 0000:04:00.0 [data]: 0x0 Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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684bb5770e
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@ -1508,44 +1508,29 @@ static uint64_t vfio_rtl8168_window_quirk_read(void *opaque,
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{
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VFIOQuirk *quirk = opaque;
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VFIOPCIDevice *vdev = quirk->vdev;
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uint64_t val = 0;
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if (!quirk->data.flags) { /* Non-MSI-X table access */
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return vfio_region_read(&vdev->bars[quirk->data.bar].region,
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addr + 0x70, size);
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}
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switch (addr) {
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case 4: /* address */
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if (quirk->data.flags) {
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trace_vfio_rtl8168_window_quirk_read_fake(
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memory_region_name(&quirk->mem),
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vdev->vbasedev.name);
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return quirk->data.address_match ^ 0x80000000U;
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}
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val = quirk->data.address_match ^ 0x80000000U; /* latch/complete */
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break;
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case 0: /* data */
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if (quirk->data.flags) {
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uint64_t val;
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trace_vfio_rtl8168_window_quirk_read_table(
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memory_region_name(&quirk->mem),
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vdev->vbasedev.name);
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if (!(vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX)) {
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return 0;
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}
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if ((vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX)) {
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memory_region_dispatch_read(&vdev->pdev.msix_table_mmio,
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(hwaddr)(quirk->data.address_match
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& 0xfff),
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&val,
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size,
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MEMTXATTRS_UNSPECIFIED);
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return val;
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(hwaddr)(quirk->data.address_match & 0xfff),
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&val, size, MEMTXATTRS_UNSPECIFIED);
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}
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break;
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}
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trace_vfio_rtl8168_window_quirk_read_direct(memory_region_name(&quirk->mem),
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vdev->vbasedev.name);
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return vfio_region_read(&vdev->bars[quirk->data.bar].region,
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addr + 0x70, size);
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trace_vfio_rtl8168_quirk_read(vdev->vbasedev.name,
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addr ? "address" : "data", val);
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return val;
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}
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static void vfio_rtl8168_window_quirk_write(void *opaque, hwaddr addr,
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@ -1556,36 +1541,36 @@ static void vfio_rtl8168_window_quirk_write(void *opaque, hwaddr addr,
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switch (addr) {
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case 4: /* address */
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if ((data & 0x7fff0000) == 0x10000) {
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if (data & 0x80000000U &&
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vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX) {
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trace_vfio_rtl8168_window_quirk_write_table(
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memory_region_name(&quirk->mem),
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vdev->vbasedev.name);
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memory_region_dispatch_write(&vdev->pdev.msix_table_mmio,
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(hwaddr)(data & 0xfff),
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(uint64_t)quirk->data.address_mask,
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size, MEMTXATTRS_UNSPECIFIED);
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}
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quirk->data.flags = 1;
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if ((data & 0x7fff0000) == 0x10000) { /* MSI-X table */
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quirk->data.flags = 1; /* Activate reads */
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quirk->data.address_match = data;
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return;
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trace_vfio_rtl8168_quirk_write(vdev->vbasedev.name, data);
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if (data & 0x80000000U) { /* Do write */
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if (vdev->pdev.cap_present & QEMU_PCI_CAP_MSIX) {
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hwaddr offset = data & 0xfff;
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uint64_t val = quirk->data.address_mask;
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trace_vfio_rtl8168_quirk_msix(vdev->vbasedev.name,
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(uint16_t)offset, val);
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/* Write to the proper guest MSI-X table instead */
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memory_region_dispatch_write(&vdev->pdev.msix_table_mmio,
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offset, val, size,
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MEMTXATTRS_UNSPECIFIED);
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}
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return; /* Do not write guest MSI-X data to hardware */
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}
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} else {
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quirk->data.flags = 0; /* De-activate reads, non-MSI-X */
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}
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quirk->data.flags = 0;
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break;
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case 0: /* data */
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quirk->data.address_mask = data;
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break;
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}
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trace_vfio_rtl8168_window_quirk_write_direct(
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memory_region_name(&quirk->mem),
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vdev->vbasedev.name);
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vfio_region_write(&vdev->bars[quirk->data.bar].region,
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addr + 0x70, data, size);
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}
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@ -1622,8 +1607,9 @@ static void vfio_probe_rtl8168_bar2_window_quirk(VFIOPCIDevice *vdev, int nr)
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QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next);
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trace_vfio_probe_rtl8168_bar2_window_quirk(vdev->vbasedev.name);
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trace_vfio_rtl8168_quirk_enable(vdev->vbasedev.name);
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}
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/*
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* Trap the BAR2 MMIO window to config space as well.
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*/
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10
trace-events
10
trace-events
@ -1554,12 +1554,10 @@ vfio_ati_3c3_quirk_read(uint64_t data) " (0x3c3, 1) = 0x%"PRIx64
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vfio_vga_probe_ati_3c3_quirk(const char *name) "Enabled ATI/AMD quirk 0x3c3 BAR4for device %s"
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vfio_probe_ati_bar4_window_quirk(const char *name) "Enabled ATI/AMD BAR4 window quirk for device %s"
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#issue with )
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vfio_rtl8168_window_quirk_read_fake(const char *region_name, const char *name) "%s fake read(%s"
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vfio_rtl8168_window_quirk_read_table(const char *region_name, const char *name) "%s MSI-X table read(%s"
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vfio_rtl8168_window_quirk_read_direct(const char *region_name, const char *name) "%s direct read(%s"
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vfio_rtl8168_window_quirk_write_table(const char *region_name, const char *name) "%s MSI-X table write(%s"
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vfio_rtl8168_window_quirk_write_direct(const char *region_name, const char *name) "%s direct write(%s"
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vfio_probe_rtl8168_bar2_window_quirk(const char *name) "Enabled RTL8168 BAR2 window quirk for device %s"
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vfio_rtl8168_quirk_read(const char *name, const char *type, uint64_t val) "%s [%s]: 0x%"PRIx64
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vfio_rtl8168_quirk_write(const char *name, uint64_t val) "%s [address]: 0x%"PRIx64
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vfio_rtl8168_quirk_msix(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
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vfio_rtl8168_quirk_enable(const char *name) "%s"
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vfio_probe_ati_bar2_4000_quirk(const char *name) "Enabled ATI/AMD BAR2 0x4000 quirk for device %s"
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vfio_nvidia_3d0_quirk_read(int size, uint64_t data) " (0x3d0, %d) = 0x%"PRIx64
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vfio_nvidia_3d0_quirk_write(uint64_t data, int size) " (0x3d0, 0x%"PRIx64", %d)"
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