From d43ed9ec2566922e76420b4ac914df6b2d473c4b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Mon, 18 Jul 2011 23:34:21 +0200 Subject: [PATCH] ds1225y: use trace framework MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Hervé Poussineau Signed-off-by: Blue Swirl --- hw/ds1225y.c | 16 +++++----------- trace-events | 4 ++++ 2 files changed, 9 insertions(+), 11 deletions(-) diff --git a/hw/ds1225y.c b/hw/ds1225y.c index 1fd701086e..5105b9bb8f 100644 --- a/hw/ds1225y.c +++ b/hw/ds1225y.c @@ -24,9 +24,7 @@ #include "hw.h" #include "mips.h" -#include "nvram.h" - -//#define DEBUG_NVRAM +#include "trace.h" typedef struct ds1225y_t { @@ -42,10 +40,7 @@ static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr) uint32_t val; val = s->contents[addr]; - -#ifdef DEBUG_NVRAM - printf("nvram: read 0x%x at " TARGET_FMT_lx "\n", val, addr); -#endif + trace_nvram_read(addr, val); return val; } @@ -71,11 +66,10 @@ static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val) { ds1225y_t *s = opaque; -#ifdef DEBUG_NVRAM - printf("nvram: write 0x%x at " TARGET_FMT_lx "\n", val, addr); -#endif + val &= 0xff; + trace_nvram_write(addr, s->contents[addr], val); - s->contents[addr] = val & 0xff; + s->contents[addr] = val; if (s->file) { qemu_fseek(s->file, addr, SEEK_SET); qemu_put_byte(s->file, (int)val); diff --git a/trace-events b/trace-events index ad11b09c0a..99a4a2b144 100644 --- a/trace-events +++ b/trace-events @@ -103,6 +103,10 @@ disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" +# hw/ds1225y.c +disable nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" +disable nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" + # hw/eccmemctl.c disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"