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target/ppc: Correct RMLS table

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The table of RMA limits based on the LPCR[RMLS] field is slightly wrong.
We're missing the RMLS == 0 => 256 GiB RMA option, which is available on
POWER8, so add that.

The comment that goes with the table is much more wrong.  We *don't* filter
invalid RMLS values when writing the LPCR, and there's not really a
sensible way to do so.  Furthermore, while in theory the set of RMLS values
is implementation dependent, it seems in practice the same set has been
available since around POWER4+ up until POWER8, the last model which
supports RMLS at all.  So, correct that as well.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
This commit is contained in:
David Gibson 2020-01-06 17:18:54 +11:00
parent a864a6b382
commit d37b40daf6
1 changed files with 4 additions and 3 deletions
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7
target/ppc/mmu-hash64.c
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@ -762,15 +762,16 @@ static target_ulong rmls_limit(PowerPCCPU *cpu)
{ {
CPUPPCState *env = &cpu->env; CPUPPCState *env = &cpu->env;
/* /*
* This is the full 4 bits encoding of POWER8. Previous * In theory the meanings of RMLS values are implementation
* CPUs only support a subset of these but the filtering * dependent. In practice, this seems to have been the set from
* is done when writing LPCR. * POWER4+..POWER8, and RMLS is no longer supported in POWER9.
* *
* Unsupported values mean the OS has shot itself in the * Unsupported values mean the OS has shot itself in the
* foot. Return a 0-sized RMA in this case, which we expect * foot. Return a 0-sized RMA in this case, which we expect
* to trigger an immediate DSI or ISI * to trigger an immediate DSI or ISI
*/ */
static const target_ulong rma_sizes[16] = { static const target_ulong rma_sizes[16] = {
[0] = 256 * GiB,
[1] = 16 * GiB, [1] = 16 * GiB,
[2] = 1 * GiB, [2] = 1 * GiB,
[3] = 64 * MiB, [3] = 64 * MiB,