exec: Add target-specific tlb bits to MemTxAttrs

These bits can be used to cache target-specific data in cputlb
read from the page tables.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190128223118.5255-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-02-05 16:52:37 +00:00 committed by Peter Maydell
parent 08f1434a71
commit d3765835ed

View File

@ -37,6 +37,16 @@ typedef struct MemTxAttrs {
unsigned int user:1; unsigned int user:1;
/* Requester ID (for MSI for example) */ /* Requester ID (for MSI for example) */
unsigned int requester_id:16; unsigned int requester_id:16;
/*
* The following are target-specific page-table bits. These are not
* related to actual memory transactions at all. However, this structure
* is part of the tlb_fill interface, cached in the cputlb structure,
* and has unused bits. These fields will be read by target-specific
* helpers using env->iotlb[mmu_idx][tlb_index()].attrs.target_tlb_bitN.
*/
unsigned int target_tlb_bit0 : 1;
unsigned int target_tlb_bit1 : 1;
unsigned int target_tlb_bit2 : 1;
} MemTxAttrs; } MemTxAttrs;
/* Bus masters which don't specify any attributes will get this, /* Bus masters which don't specify any attributes will get this,