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docs/system: riscv: Fix CLINT name in the sifive_u doc

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It's Core *Local* Interruptor, not 'Level'.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210627142816.19789-1-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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Bin Meng 2021-06-27 22:28:15 +08:00 committed by Alistair Francis
parent 232a2c8c85
commit d374575100
1 changed files with 1 additions and 1 deletions
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docs/system/riscv/sifive_u.rst
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@ -11,7 +11,7 @@ The ``sifive_u`` machine supports the following devices:
* 1 E51 / E31 core * 1 E51 / E31 core
* Up to 4 U54 / U34 cores * Up to 4 U54 / U34 cores
* Core Level Interruptor (CLINT) * Core Local Interruptor (CLINT)
* Platform-Level Interrupt Controller (PLIC) * Platform-Level Interrupt Controller (PLIC)
* Power, Reset, Clock, Interrupt (PRCI) * Power, Reset, Clock, Interrupt (PRCI)
* L2 Loosely Integrated Memory (L2-LIM) * L2 Loosely Integrated Memory (L2-LIM)