target/s390x: improve MOVE LONG and MOVE LONG EXTENDED
As MVCL and MVCLE only differ by their operands, use a common do_mvcl helper. Optimize it calling fast_memmove and fast_memset. Correctly write back addresses. Check that r1 and r2/r3 registers are even. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-21-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -576,6 +576,38 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3)
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}
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}
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/* move long helper */
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static inline uint32_t do_mvcl(CPUS390XState *env,
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uint64_t *dest, uint64_t *destlen,
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uint64_t *src, uint64_t *srclen,
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uint8_t pad, uintptr_t ra)
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{
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uint64_t len = MIN(*srclen, *destlen);
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uint32_t cc;
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if (*destlen == *srclen) {
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cc = 0;
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} else if (*destlen < *srclen) {
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cc = 1;
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} else {
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cc = 2;
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}
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/* Copy the src array */
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fast_memmove(env, *dest, *src, len, ra);
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*src += len;
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*srclen -= len;
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*dest += len;
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*destlen -= len;
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/* Pad the remaining area */
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fast_memset(env, *dest, pad, *destlen, ra);
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*dest += *destlen;
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*destlen = 0;
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return cc;
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}
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/* move long */
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uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, uint32_t r2)
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{
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@ -585,40 +617,19 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, uint32_t r2)
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uint64_t srclen = env->regs[r2 + 1] & 0xffffff;
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uint64_t src = get_address(env, r2);
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uint8_t pad = env->regs[r2 + 1] >> 24;
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uint8_t v;
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uint32_t cc;
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if (destlen == srclen) {
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cc = 0;
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} else if (destlen < srclen) {
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cc = 1;
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} else {
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cc = 2;
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}
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cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, ra);
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if (srclen > destlen) {
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srclen = destlen;
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}
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for (; destlen && srclen; src++, dest++, destlen--, srclen--) {
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v = cpu_ldub_data_ra(env, src, ra);
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cpu_stb_data_ra(env, dest, v, ra);
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}
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for (; destlen; dest++, destlen--) {
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cpu_stb_data_ra(env, dest, pad, ra);
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}
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env->regs[r1 + 1] = destlen;
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/* can't use srclen here, we trunc'ed it */
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env->regs[r2 + 1] -= src - env->regs[r2];
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env->regs[r1 + 1] = deposit64(env->regs[r1 + 1], 0, 24, destlen);
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env->regs[r2 + 1] = deposit64(env->regs[r2 + 1], 0, 24, srclen);
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set_address(env, r1, dest);
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set_address(env, r2, src);
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return cc;
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}
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/* move long extended another memcopy insn with more bells and whistles */
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/* move long extended */
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uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1, uint64_t a2,
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uint32_t r3)
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{
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@ -627,34 +638,13 @@ uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1, uint64_t a2,
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uint64_t dest = get_address(env, r1);
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uint64_t srclen = get_length(env, r3 + 1);
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uint64_t src = get_address(env, r3);
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uint8_t pad = a2 & 0xff;
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uint8_t v;
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uint8_t pad = a2;
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uint32_t cc;
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if (destlen == srclen) {
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cc = 0;
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} else if (destlen < srclen) {
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cc = 1;
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} else {
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cc = 2;
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}
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if (srclen > destlen) {
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srclen = destlen;
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}
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for (; destlen && srclen; src++, dest++, destlen--, srclen--) {
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v = cpu_ldub_data_ra(env, src, ra);
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cpu_stb_data_ra(env, dest, v, ra);
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}
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for (; destlen; dest++, destlen--) {
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cpu_stb_data_ra(env, dest, pad, ra);
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}
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cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, ra);
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set_length(env, r1 + 1, destlen);
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/* can't use srclen here, we trunc'ed it */
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set_length(env, r3 + 1, env->regs[r3 + 1] - src - env->regs[r3]);
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set_length(env, r3 + 1, srclen);
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set_address(env, r1, dest);
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set_address(env, r3, src);
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@ -2979,22 +2979,42 @@ static ExitStatus op_mvcin(DisasContext *s, DisasOps *o)
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static ExitStatus op_mvcl(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r2 = tcg_const_i32(get_field(s->fields, r2));
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gen_helper_mvcl(cc_op, cpu_env, r1, r2);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r2);
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int r1 = get_field(s->fields, r1);
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int r2 = get_field(s->fields, r2);
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TCGv_i32 t1, t2;
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/* r1 and r2 must be even. */
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if (r1 & 1 || r2 & 1) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return EXIT_NORETURN;
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}
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t1 = tcg_const_i32(r1);
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t2 = tcg_const_i32(r2);
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gen_helper_mvcl(cc_op, cpu_env, t1, t2);
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tcg_temp_free_i32(t1);
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tcg_temp_free_i32(t2);
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set_cc_static(s);
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return NO_EXIT;
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}
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static ExitStatus op_mvcle(DisasContext *s, DisasOps *o)
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{
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TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
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TCGv_i32 r3 = tcg_const_i32(get_field(s->fields, r3));
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gen_helper_mvcle(cc_op, cpu_env, r1, o->in2, r3);
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tcg_temp_free_i32(r1);
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tcg_temp_free_i32(r3);
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int r1 = get_field(s->fields, r1);
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int r3 = get_field(s->fields, r3);
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TCGv_i32 t1, t3;
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/* r1 and r3 must be even. */
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if (r1 & 1 || r3 & 1) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return EXIT_NORETURN;
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}
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t1 = tcg_const_i32(r1);
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t3 = tcg_const_i32(r3);
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gen_helper_mvcle(cc_op, cpu_env, t1, o->in2, t3);
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tcg_temp_free_i32(t1);
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tcg_temp_free_i32(t3);
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set_cc_static(s);
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return NO_EXIT;
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}
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