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aspeed: Parameterise number of MACs

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To support the ast2600's four MACs allow SoCs to specify the number
they have, and create that many.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190925143248.10000-22-clg@kaod.org
[clg: - included a check on sc->macs_num when realizing the macs
      - included interrupt definitions for the AST2600 ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Joel Stanley 2019-09-25 16:32:46 +02:00 committed by Peter Maydell
parent 519370bc63
commit d300db0277
3 changed files with 16 additions and 5 deletions
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10
hw/arm/aspeed_ast2600.c
View File

@ -32,7 +32,9 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_SPI1] = 0x1E630000,
[ASPEED_SPI2] = 0x1E641000,
[ASPEED_ETH1] = 0x1E660000,
[ASPEED_ETH3] = 0x1E670000,
[ASPEED_ETH2] = 0x1E680000,
[ASPEED_ETH4] = 0x1E690000,
[ASPEED_VIC] = 0x1E6C0000,
[ASPEED_SDMC] = 0x1E6E0000,
[ASPEED_SCU] = 0x1E6E2000,
@ -88,6 +90,9 @@ static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_I2C] = 110, /* 110 -> 125 */
[ASPEED_ETH1] = 2,
[ASPEED_ETH2] = 3,
[ASPEED_ETH3] = 32,
[ASPEED_ETH4] = 33,
};
static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl)
@ -173,7 +178,7 @@ static void aspeed_soc_ast2600_init(Object *obj)
OBJECT(&s->scu), &error_abort);
}
for (i = 0; i < ASPEED_MACS_NUM; i++) {
for (i = 0; i < sc->macs_num; i++) {
sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
}
@ -397,7 +402,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
/* Net */
for (i = 0; i < nb_nics; i++) {
for (i = 0; i < nb_nics && i < sc->macs_num; i++) {
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
@ -470,6 +475,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
sc->sram_size = 0x10000;
sc->spis_num = 2;
sc->wdts_num = 4;
sc->macs_num = 4;
sc->irqmap = aspeed_soc_ast2600_irqmap;
sc->memmap = aspeed_soc_ast2600_memmap;
sc->num_cpus = 2;

6
hw/arm/aspeed_soc.c
View File

@ -198,7 +198,7 @@ static void aspeed_soc_init(Object *obj)
OBJECT(&s->scu), &error_abort);
}
for (i = 0; i < ASPEED_MACS_NUM; i++) {
for (i = 0; i < sc->macs_num; i++) {
sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
}
@ -372,7 +372,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
}
/* Net */
for (i = 0; i < nb_nics; i++) {
for (i = 0; i < nb_nics && i < sc->macs_num; i++) {
qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
@ -455,6 +455,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc, void *data)
sc->sram_size = 0x8000;
sc->spis_num = 1;
sc->wdts_num = 2;
sc->macs_num = 2;
sc->irqmap = aspeed_soc_ast2400_irqmap;
sc->memmap = aspeed_soc_ast2400_memmap;
sc->num_cpus = 1;
@ -478,6 +479,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc, void *data)
sc->sram_size = 0x9000;
sc->spis_num = 2;
sc->wdts_num = 3;
sc->macs_num = 2;
sc->irqmap = aspeed_soc_ast2500_irqmap;
sc->memmap = aspeed_soc_ast2500_memmap;
sc->num_cpus = 1;

5
include/hw/arm/aspeed_soc.h
View File

@ -30,7 +30,7 @@
#define ASPEED_SPIS_NUM 2
#define ASPEED_WDTS_NUM 4
#define ASPEED_CPUS_NUM 2
#define ASPEED_MACS_NUM 2
#define ASPEED_MACS_NUM 4
typedef struct AspeedSoCState {
/*< private >*/
@ -69,6 +69,7 @@ typedef struct AspeedSoCClass {
uint64_t sram_size;
int spis_num;
int wdts_num;
int macs_num;
const int *irqmap;
const hwaddr *memmap;
uint32_t num_cpus;
@ -114,6 +115,8 @@ enum {
ASPEED_I2C,
ASPEED_ETH1,
ASPEED_ETH2,
ASPEED_ETH3,
ASPEED_ETH4,
ASPEED_SDRAM,
ASPEED_XDMA,
};