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Work around QEMU GDB stub suboptimality

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The current XML files claim, on floating point-supporting Power chips,
that $f0 is register 70.  This would be fine, except that register 70
for non-XML-aware GDB is FPSCR.  More importantly, 70 is less than
NUM_CORE_REGS (71) for Power, so a request for register 70 goes to the
"core" register reading routines, rather than the floating-point
register read routine we registered with gdb_register_coprocessor.

Therefore, when we are talking to an XML-aware GDB, we claim that
register has zero width, which causes the rest of QEMU's GDB stub to
send an error back to GDB, which causes GDB to be unable to read the
floating-point registers.  (The problem is also present for SPE
registers and occurs in a slightly different way for Altivec registers.)

The best way to fix this is to have the "core register" XML files for
PPC32 and PPC64 claim that there is a 4-byte register 70, which causes
$f0 to be register 71, and everything works just fine from that point
forward.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6770 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-03-07 22:00:56 +00:00
parent 70976a7926
commit d2c753454e
2 changed files with 18 additions and 0 deletions
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9
gdb-xml/power-core.xml
View File

@ -46,4 +46,13 @@
<reg name="lr" bitsize="32" type="code_ptr"/>
<reg name="ctr" bitsize="32" type="uint32"/>
<reg name="xer" bitsize="32" type="uint32"/>
<!-- HACK: The way the QEMU GDB stub code is currently written requires
the "integer" registers from the XML file to span the entirety of
NUM_CORE_REGS that non-XML-aware GDB requires. Otherwise, XML-aware
GDB thinks that "coprocessor" registers from XML, such as the
floating-point registers, have register numbers less than
NUM_CORE_REGS. This can lead to problems. Work around it by using
an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
this register is 70. It would be fpscr for non-XML-aware GDB. -->
<reg name="" bitsize="32" type="uint32"/>
</feature>

9
gdb-xml/power64-core.xml
View File

@ -46,4 +46,13 @@
<reg name="lr" bitsize="64" type="code_ptr"/>
<reg name="ctr" bitsize="64" type="uint64"/>
<reg name="xer" bitsize="32" type="uint32"/>
<!-- HACK: The way the QEMU GDB stub code is currently written requires
the "integer" registers from the XML file to span the entirety of
NUM_CORE_REGS that non-XML-aware GDB requires. Otherwise, XML-aware
GDB thinks that "coprocessor" registers from XML, such as the
floating-point registers, have register numbers less than
NUM_CORE_REGS. This can lead to problems. Work around it by using
an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
this register is 70. It would be fpscr for non-XML-aware GDB. -->
<reg name="" bitsize="32" type="uint32"/>
</feature>