Avoid refering to CRIS specific cpu-state to be able to use these blocks with other cores.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4806 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
d077b6f759
commit
d27b2e5044
@ -353,8 +353,8 @@ static void channel_stream_cmd(struct fs_dma_ctrl *ctrl, int c, uint32_t v)
|
||||
{
|
||||
unsigned int cmd = v & ((1 << 10) - 1);
|
||||
|
||||
D(printf("%s ch=%d cmd=%x pc=%x\n",
|
||||
__func__, c, cmd, ctrl->env->pc));
|
||||
D(printf("%s ch=%d cmd=%x\n",
|
||||
__func__, c, cmd));
|
||||
if (cmd & regk_dma_load_d) {
|
||||
channel_load_d(ctrl, c);
|
||||
if (cmd & regk_dma_burst)
|
||||
@ -541,8 +541,8 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
struct fs_dma_ctrl *ctrl = opaque;
|
||||
CPUState *env = ctrl->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -566,8 +566,8 @@ dma_readl (void *opaque, target_phys_addr_t addr)
|
||||
|
||||
default:
|
||||
r = ctrl->channels[c].regs[addr];
|
||||
D(printf ("%s c=%d addr=%x pc=%x\n",
|
||||
__func__, c, addr, ctrl->env->pc));
|
||||
D(printf ("%s c=%d addr=%x\n",
|
||||
__func__, c, addr));
|
||||
break;
|
||||
}
|
||||
return r;
|
||||
@ -578,8 +578,8 @@ dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
{
|
||||
struct fs_dma_ctrl *ctrl = opaque;
|
||||
CPUState *env = ctrl->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -623,14 +623,12 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
|
||||
case RW_STREAM_CMD:
|
||||
ctrl->channels[c].regs[addr] = value;
|
||||
D(printf("stream_cmd ch=%d pc=%x\n",
|
||||
c, ctrl->env->pc));
|
||||
D(printf("stream_cmd ch=%d\n", c));
|
||||
channel_stream_cmd(ctrl, c, value);
|
||||
break;
|
||||
|
||||
default:
|
||||
D(printf ("%s c=%d %x %x pc=%x\n",
|
||||
__func__, c, addr, value, ctrl->env->pc));
|
||||
D(printf ("%s c=%d %x %x\n", __func__, c, addr));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -330,15 +330,14 @@ static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
struct fs_eth *eth = opaque;
|
||||
CPUState *env = eth->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
struct fs_eth *eth = opaque;
|
||||
D(CPUState *env = eth->env);
|
||||
uint32_t r = 0;
|
||||
|
||||
/* Make addr relative to this instances base. */
|
||||
@ -350,7 +349,7 @@ static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
|
||||
break;
|
||||
default:
|
||||
r = eth->regs[addr];
|
||||
D(printf ("%s %x p=%x\n", __func__, addr, env->pc));
|
||||
D(printf ("%s %x\n", __func__, addr));
|
||||
break;
|
||||
}
|
||||
return r;
|
||||
@ -361,8 +360,8 @@ eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
{
|
||||
struct fs_eth *eth = opaque;
|
||||
CPUState *env = eth->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
}
|
||||
|
||||
static void eth_update_ma(struct fs_eth *eth, int ma)
|
||||
|
@ -89,7 +89,7 @@ static void ser_update_irq(struct etrax_serial_t *s)
|
||||
static uint32_t ser_readb (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
D(CPUState *env = opaque);
|
||||
D(printf ("%s %x pc=%x\n", __func__, addr, env->pc));
|
||||
D(printf ("%s %x\n", __func__, addr));
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -132,7 +132,7 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
|
||||
break;
|
||||
|
||||
default:
|
||||
D(printf ("%s %x p=%x\n", __func__, addr, env->pc));
|
||||
D(printf ("%s %x\n", __func__, addr));
|
||||
break;
|
||||
}
|
||||
return r;
|
||||
@ -143,7 +143,7 @@ ser_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
{
|
||||
D(struct etrax_serial_t *s = opaque);
|
||||
D(CPUState *env = s->env);
|
||||
D(printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc));
|
||||
D(printf ("%s %x %x\n", __func__, addr, value));
|
||||
}
|
||||
static void
|
||||
ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
@ -181,8 +181,7 @@ ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
s->rw_intr_mask = value;
|
||||
break;
|
||||
default:
|
||||
D(printf ("%s %x %x pc=%x\n",
|
||||
__func__, addr, value, env->pc));
|
||||
D(printf ("%s %x %x\n", __func__, addr, value));
|
||||
break;
|
||||
}
|
||||
ser_update_irq(s);
|
||||
|
@ -80,15 +80,14 @@ static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
struct fs_timer_t *t = opaque;
|
||||
CPUState *env = t->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
||||
{
|
||||
struct fs_timer_t *t = opaque;
|
||||
D(CPUState *env = t->env);
|
||||
uint32_t r = 0;
|
||||
|
||||
/* Make addr relative to this instances base. */
|
||||
@ -109,7 +108,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
|
||||
r = t->r_intr & t->rw_intr_mask;
|
||||
break;
|
||||
default:
|
||||
D(printf ("%s %x p=%x\n", __func__, addr, env->pc));
|
||||
D(printf ("%s %x\n", __func__, addr));
|
||||
break;
|
||||
}
|
||||
return r;
|
||||
@ -120,8 +119,8 @@ timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
{
|
||||
struct fs_timer_t *t = opaque;
|
||||
CPUState *env = t->env;
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx
|
||||
" pc=%x.\n", addr, env->pc);
|
||||
cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
|
||||
addr);
|
||||
}
|
||||
|
||||
#define TIMER_SLOWDOWN 1
|
||||
@ -273,7 +272,6 @@ static void
|
||||
timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
{
|
||||
struct fs_timer_t *t = opaque;
|
||||
CPUState *env = t->env;
|
||||
|
||||
/* Make addr relative to this instances base. */
|
||||
addr -= t->base;
|
||||
@ -309,8 +307,8 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
||||
t->rw_ack_intr = 0;
|
||||
break;
|
||||
default:
|
||||
printf ("%s " TARGET_FMT_plx " %x pc=%x\n",
|
||||
__func__, addr, value, env->pc);
|
||||
printf ("%s " TARGET_FMT_plx " %x\n",
|
||||
__func__, addr, value);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user