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x86_64 mmx/sse fix

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1969 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2006-06-14 14:29:34 +00:00
parent 4bb3973f61
commit d1e42c5c1e
1 changed files with 11 additions and 1 deletions
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12
target-i386/translate.c
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@ -2905,6 +2905,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
break; break;
case 0xc4: /* pinsrw */ case 0xc4: /* pinsrw */
case 0x1c4: case 0x1c4:
s->rip_offset = 1;
gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0);
val = ldub_code(s->pc++); val = ldub_code(s->pc++);
if (b1) { if (b1) {
@ -2975,7 +2976,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
} }
} else { } else {
/* generic MMX or SSE operation */ /* generic MMX or SSE operation */
if (b == 0xf7) { switch(b) {
case 0xf7:
/* maskmov : we must prepare A0 */ /* maskmov : we must prepare A0 */
if (mod != 3) if (mod != 3)
goto illegal_op; goto illegal_op;
@ -2990,6 +2992,14 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
gen_op_andl_A0_ffff(); gen_op_andl_A0_ffff();
} }
gen_add_A0_ds_seg(s); gen_add_A0_ds_seg(s);
break;
case 0x70: /* pshufx insn */
case 0xc6: /* pshufx insn */
case 0xc2: /* compare insns */
s->rip_offset = 1;
break;
default:
break;
} }
if (is_xmm) { if (is_xmm) {
op1_offset = offsetof(CPUX86State,xmm_regs[reg]); op1_offset = offsetof(CPUX86State,xmm_regs[reg]);