target/riscv: debug: Create common trigger actions function
Trigger actions are shared among all triggers. Extract to a common function. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> [bmeng: handle the DBG_ACTION_NONE case] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220909134215.1843865-7-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -92,6 +92,37 @@ static inline target_ulong get_trigger_type(CPURISCVState *env,
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return extract_trigger_type(env, env->tdata1[trigger_index]);
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}
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static trigger_action_t get_trigger_action(CPURISCVState *env,
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target_ulong trigger_index)
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{
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target_ulong tdata1 = env->tdata1[trigger_index];
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int trigger_type = get_trigger_type(env, trigger_index);
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trigger_action_t action = DBG_ACTION_NONE;
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switch (trigger_type) {
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case TRIGGER_TYPE_AD_MATCH:
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action = (tdata1 & TYPE2_ACTION) >> 12;
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break;
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case TRIGGER_TYPE_INST_CNT:
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case TRIGGER_TYPE_INT:
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case TRIGGER_TYPE_EXCP:
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case TRIGGER_TYPE_AD_MATCH6:
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case TRIGGER_TYPE_EXT_SRC:
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qemu_log_mask(LOG_UNIMP, "trigger type: %d is not supported\n",
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trigger_type);
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break;
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case TRIGGER_TYPE_NO_EXIST:
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case TRIGGER_TYPE_UNAVAIL:
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qemu_log_mask(LOG_GUEST_ERROR, "trigger type: %d does not exit\n",
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trigger_type);
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break;
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default:
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g_assert_not_reached();
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}
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return action;
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}
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static inline target_ulong build_tdata1(CPURISCVState *env,
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trigger_type_t type,
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bool dmode, target_ulong data)
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@ -182,6 +213,30 @@ static inline void warn_always_zero_bit(target_ulong val, target_ulong mask,
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}
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}
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static void do_trigger_action(CPURISCVState *env, target_ulong trigger_index)
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{
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trigger_action_t action = get_trigger_action(env, trigger_index);
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switch (action) {
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case DBG_ACTION_NONE:
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break;
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case DBG_ACTION_BP:
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riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0);
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break;
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case DBG_ACTION_DBG_MODE:
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case DBG_ACTION_TRACE0:
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case DBG_ACTION_TRACE1:
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case DBG_ACTION_TRACE2:
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case DBG_ACTION_TRACE3:
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case DBG_ACTION_EXT_DBG0:
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case DBG_ACTION_EXT_DBG1:
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qemu_log_mask(LOG_UNIMP, "action: %d is not supported\n", action);
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break;
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default:
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g_assert_not_reached();
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}
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}
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/* type 2 trigger */
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static uint32_t type2_breakpoint_size(CPURISCVState *env, target_ulong ctrl)
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@ -384,11 +439,11 @@ void riscv_cpu_debug_excp_handler(CPUState *cs)
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if (cs->watchpoint_hit) {
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if (cs->watchpoint_hit->flags & BP_CPU) {
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cs->watchpoint_hit = NULL;
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riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0);
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do_trigger_action(env, DBG_ACTION_BP);
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}
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} else {
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if (cpu_breakpoint_test(cs, env->pc, BP_CPU)) {
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riscv_raise_exception(env, RISCV_EXCP_BREAKPOINT, 0);
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do_trigger_action(env, DBG_ACTION_BP);
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}
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}
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}
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@ -44,6 +44,19 @@ typedef enum {
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TRIGGER_TYPE_NUM
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} trigger_type_t;
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/* actions */
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typedef enum {
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DBG_ACTION_NONE = -1, /* sentinel value */
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DBG_ACTION_BP = 0,
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DBG_ACTION_DBG_MODE,
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DBG_ACTION_TRACE0,
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DBG_ACTION_TRACE1,
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DBG_ACTION_TRACE2,
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DBG_ACTION_TRACE3,
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DBG_ACTION_EXT_DBG0 = 8,
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DBG_ACTION_EXT_DBG1
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} trigger_action_t;
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/* tdata1 field masks */
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#define RV32_TYPE(t) ((uint32_t)(t) << 28)
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