QOM CPUState refactorings / X86CPU
* CPUState layout optimization for TCG -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJTKhFyAAoJEPou0S0+fgE/rhEQAI0ANFX4R2u6zI0Gp+VZkj/g uGnn09Atg57nPyunwPbkleMqWgsTEvzFPYGTFRMjfzuMnDOPzTBxR6SjWys0Fqim esduLKQgFsePmDpcWGlAZDfW0TdLQG5pt3iADvaDBTqWHuAMWzuyfSe7Xm4N5MCn xOUlUcXMTI66b+5WoGdufaCDZAsS81BescmUvD9eyAY8bWJsYI8NrxhoyefmLh8I ZpKFBELIyv/3ejtTmAZGliRfXDZfjRr1enjCN8FeOjV8m7vBrpyhL1Cuu0Dxgcbh qmDJVGkcAlQGoZCZ9q+duHnIvwItaasxRpFkkf4R93LWPkZLbH7h/QXTG1D3Nkep wdCe2MOOtUizck7L/clK2pq3wh47IGP4lGmZx4iD9zb8tdzY+IN2G7jt7nYp739W 4pbj/mVSVxIV10dW1djP/Eqbi8ilLZ4aoNg/daUN7BjgtE0RJEyu6emSpEggHRMO ot/6Ijc2FP0XTKaCf2bVv+3PvaNX2es5qCeovTlJVUa/c+Hyz/ZNgasnyc+sEGPR csYsdDdAFI4oPPxjOR+99rX71T6YL09TB2sDlE6bFA5sUDLpD3DIE/2vq47Abes2 xCEjAcmFVrUwJph9a32jt1qJRBqHp07tc2V3Q1KYRHqx+UJJTP0EXZg2pzVaL/cv jmnLEwMuBxq/gjD4+VGA =71uu -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-2.0' into staging QOM CPUState refactorings / X86CPU * CPUState layout optimization for TCG # gpg: Signature made Wed 19 Mar 2014 21:51:46 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-cpu-for-2.0: cpu: Move tcg_exit_req to the end of CPUState Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d1a1451cd3
@ -227,7 +227,6 @@ struct CPUState {
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bool stop;
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bool stopped;
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volatile sig_atomic_t exit_request;
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volatile sig_atomic_t tcg_exit_req;
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uint32_t interrupt_request;
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int singlestep_enabled;
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int64_t icount_extra;
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@ -272,6 +271,12 @@ struct CPUState {
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} icount_decr;
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uint32_t can_do_io;
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int32_t exception_index; /* used by m68k TCG */
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/* Note that this is accessed at the start of every TB via a negative
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offset from AREG0. Leave this field at the end so as to make the
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(absolute value) offset as small as possible. This reduces code
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size, especially for hosts without large memory offsets. */
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volatile sig_atomic_t tcg_exit_req;
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};
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QTAILQ_HEAD(CPUTailQ, CPUState);
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