ahci.c: mask unused flags when reading size PRDT DBC
The data byte count(DBC) read from the description information is defined for bits 21:00. Bits 30:22 are reserved and bit 31 is the Interrupt on Completion (I) flag. Completion interrupts are triggered after every transaction instead of on I-flag in QEMU. tbl_entry_size is a signed integer and improperly reading the DBC leads to a negative offset that causes sglist allocation to fail. Signed-off-by: Reza Jelveh <reza.jelveh@tuhh.de> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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@ -639,6 +639,11 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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}
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}
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static int prdt_tbl_entry_size(const AHCI_SG *tbl)
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{
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return (le32_to_cpu(tbl->flags_size) & AHCI_PRDT_SIZE_MASK) + 1;
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}
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static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
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{
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AHCICmdHdr *cmd = ad->cur_cmd;
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@ -681,7 +686,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
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sum = 0;
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for (i = 0; i < sglist_alloc_hint; i++) {
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/* flags_size is zero-based */
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tbl_entry_size = (le32_to_cpu(tbl[i].flags_size) + 1);
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tbl_entry_size = prdt_tbl_entry_size(&tbl[i]);
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if (offset <= (sum + tbl_entry_size)) {
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off_idx = i;
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off_pos = offset - sum;
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@ -700,12 +705,12 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset)
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qemu_sglist_init(sglist, qbus->parent, (sglist_alloc_hint - off_idx),
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ad->hba->as);
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qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos),
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le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos);
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prdt_tbl_entry_size(&tbl[off_idx]) - off_pos);
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for (i = off_idx + 1; i < sglist_alloc_hint; i++) {
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/* flags_size is zero-based */
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qemu_sglist_add(sglist, le64_to_cpu(tbl[i].addr),
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le32_to_cpu(tbl[i].flags_size) + 1);
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prdt_tbl_entry_size(&tbl[i]));
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}
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}
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@ -201,6 +201,8 @@
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#define AHCI_COMMAND_TABLE_ACMD 0x40
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#define AHCI_PRDT_SIZE_MASK 0x3fffff
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#define IDE_FEATURE_DMA 1
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#define READ_FPDMA_QUEUED 0x60
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