First round of s390x patches for 3.1:

- add compat machine for 3.1
 - remove deprecated 's390-squash-mcss' option
 - cpu models: add "max" cpu model, enhance feature group code
 - kvm: add support for etoken facility and huge page backing
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Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180820' into staging

First round of s390x patches for 3.1:
- add compat machine for 3.1
- remove deprecated 's390-squash-mcss' option
- cpu models: add "max" cpu model, enhance feature group code
- kvm: add support for etoken facility and huge page backing

# gpg: Signature made Mon 20 Aug 2018 13:47:38 BST
# gpg:                using RSA key DECF6B93C6F02FAF
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>"
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>"
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>"
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20180820:
  s390x: Enable KVM huge page backing support
  s390x/kvm: add etoken facility
  linux-headers: update
  s390x/cpumodel: Add "-cpu max" support
  s390x: remove 's390-squash-mcss' option
  s390x/cpumodel: enum type S390FeatGroup now gets generated
  s390x: introduce 3.1 compat machine

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2018-08-20 17:41:18 +01:00
commit d0092d90eb
36 changed files with 460 additions and 157 deletions

View File

@ -98,13 +98,10 @@ static void emulated_ccw_3270_realize(DeviceState *ds, Error **errp)
EmulatedCcw3270Class *ck = EMULATED_CCW_3270_GET_CLASS(dev);
CcwDevice *cdev = CCW_DEVICE(ds);
CCWDeviceClass *cdk = CCW_DEVICE_GET_CLASS(cdev);
DeviceState *parent = DEVICE(cdev);
BusState *qbus = qdev_get_parent_bus(parent);
VirtualCssBus *cbus = VIRTUAL_CSS_BUS(qbus);
SubchDev *sch;
Error *err = NULL;
sch = css_create_sch(cdev->devno, cbus->squash_mcss, errp);
sch = css_create_sch(cdev->devno, errp);
if (!sch) {
return;
}

View File

@ -106,7 +106,6 @@ VirtualCssBus *virtual_css_bus_init(void)
/* Create bus on bridge device */
bus = qbus_create(TYPE_VIRTUAL_CSS_BUS, dev, "virtual-css");
cbus = VIRTUAL_CSS_BUS(bus);
cbus->squash_mcss = s390_get_squash_mcss();
/* Enable hotplugging */
qbus_set_hotplug_handler(bus, dev, &error_abort);

View File

@ -2359,15 +2359,13 @@ const PropertyInfo css_devid_ro_propinfo = {
.get = get_css_devid,
};
SubchDev *css_create_sch(CssDevId bus_id, bool squash_mcss, Error **errp)
SubchDev *css_create_sch(CssDevId bus_id, Error **errp)
{
uint16_t schid = 0;
SubchDev *sch;
if (bus_id.valid) {
if (squash_mcss) {
bus_id.cssid = channel_subsys.default_cssid;
} else if (!channel_subsys.css[bus_id.cssid]) {
if (!channel_subsys.css[bus_id.cssid]) {
css_create_css_image(bus_id.cssid, false);
}

View File

@ -67,8 +67,6 @@ static void s390_ccw_realize(S390CCWDevice *cdev, char *sysfsdev, Error **errp)
CcwDevice *ccw_dev = CCW_DEVICE(cdev);
CCWDeviceClass *ck = CCW_DEVICE_GET_CLASS(ccw_dev);
DeviceState *parent = DEVICE(ccw_dev);
BusState *qbus = qdev_get_parent_bus(parent);
VirtualCssBus *cbus = VIRTUAL_CSS_BUS(qbus);
SubchDev *sch;
int ret;
Error *err = NULL;
@ -78,7 +76,7 @@ static void s390_ccw_realize(S390CCWDevice *cdev, char *sysfsdev, Error **errp)
goto out_err_propagate;
}
sch = css_create_sch(ccw_dev->devno, cbus->squash_mcss, &err);
sch = css_create_sch(ccw_dev->devno, &err);
if (!sch) {
goto out_mdevid_free;
}

View File

@ -282,19 +282,8 @@ static void ccw_init(MachineState *machine)
virtio_ccw_register_hcalls();
s390_enable_css_support(s390_cpu_addr2state(0));
/*
* Non mcss-e enabled guests only see the devices from the default
* css, which is determined by the value of the squash_mcss property.
*/
if (css_bus->squash_mcss) {
ret = css_create_css_image(0, true);
} else {
ret = css_create_css_image(VIRTUAL_CSSID, true);
}
if (qemu_opt_get(qemu_get_machine_opts(), "s390-squash-mcss")) {
warn_report("The machine property 's390-squash-mcss' is deprecated"
" (obsoleted by lifting the cssid restrictions).");
}
ret = css_create_css_image(VIRTUAL_CSSID, true);
assert(ret == 0);
if (css_migration_enabled()) {
@ -575,21 +564,6 @@ static void machine_set_loadparm(Object *obj, const char *val, Error **errp)
ms->loadparm[i] = ' '; /* pad right with spaces */
}
}
static inline bool machine_get_squash_mcss(Object *obj, Error **errp)
{
S390CcwMachineState *ms = S390_CCW_MACHINE(obj);
return ms->s390_squash_mcss;
}
static inline void machine_set_squash_mcss(Object *obj, bool value,
Error **errp)
{
S390CcwMachineState *ms = S390_CCW_MACHINE(obj);
ms->s390_squash_mcss = value;
}
static inline void s390_machine_initfn(Object *obj)
{
object_property_add_bool(obj, "aes-key-wrap",
@ -614,13 +588,6 @@ static inline void s390_machine_initfn(Object *obj)
" to upper case) to pass to machine loader, boot manager,"
" and guest kernel",
NULL);
object_property_add_bool(obj, "s390-squash-mcss",
machine_get_squash_mcss,
machine_set_squash_mcss, NULL);
object_property_set_description(obj, "s390-squash-mcss", "(deprecated) "
"enable/disable squashing subchannels into the default css",
NULL);
object_property_set_bool(obj, false, "s390-squash-mcss", NULL);
}
static const TypeInfo ccw_machine_info = {
@ -673,6 +640,9 @@ bool css_migration_enabled(void)
} \
type_init(ccw_machine_register_##suffix)
#define CCW_COMPAT_3_0 \
HW_COMPAT_3_0
#define CCW_COMPAT_2_12 \
HW_COMPAT_2_12
@ -761,14 +731,26 @@ bool css_migration_enabled(void)
.value = "0",\
},
static void ccw_machine_3_1_instance_options(MachineState *machine)
{
}
static void ccw_machine_3_1_class_options(MachineClass *mc)
{
}
DEFINE_CCW_MACHINE(3_1, "3.1", true);
static void ccw_machine_3_0_instance_options(MachineState *machine)
{
ccw_machine_3_1_instance_options(machine);
}
static void ccw_machine_3_0_class_options(MachineClass *mc)
{
ccw_machine_3_1_class_options(mc);
SET_MACHINE_COMPAT(mc, CCW_COMPAT_3_0);
}
DEFINE_CCW_MACHINE(3_0, "3.0", true);
DEFINE_CCW_MACHINE(3_0, "3.0", false);
static void ccw_machine_2_12_instance_options(MachineState *machine)
{

View File

@ -694,13 +694,10 @@ static void virtio_ccw_device_realize(VirtioCcwDevice *dev, Error **errp)
VirtIOCCWDeviceClass *k = VIRTIO_CCW_DEVICE_GET_CLASS(dev);
CcwDevice *ccw_dev = CCW_DEVICE(dev);
CCWDeviceClass *ck = CCW_DEVICE_GET_CLASS(ccw_dev);
DeviceState *parent = DEVICE(ccw_dev);
BusState *qbus = qdev_get_parent_bus(parent);
VirtualCssBus *cbus = VIRTUAL_CSS_BUS(qbus);
SubchDev *sch;
Error *err = NULL;
sch = css_create_sch(ccw_dev->devno, cbus->squash_mcss, errp);
sch = css_create_sch(ccw_dev->devno, errp);
if (!sch) {
return;
}

View File

@ -1,6 +1,9 @@
#ifndef HW_COMPAT_H
#define HW_COMPAT_H
#define HW_COMPAT_3_0 \
/* empty */
#define HW_COMPAT_2_12 \
{\
.driver = "migration",\

View File

@ -28,7 +28,6 @@ typedef struct VirtualCssBridge {
/* virtual css bus type */
typedef struct VirtualCssBus {
BusState parent_obj;
bool squash_mcss;
} VirtualCssBus;
#define TYPE_VIRTUAL_CSS_BUS "virtual-css-bus"

View File

@ -266,11 +266,8 @@ extern const PropertyInfo css_devid_ro_propinfo;
/**
* Create a subchannel for the given bus id.
*
* If @p bus_id is valid, and @p squash_mcss is true, verify that it is
* not already in use in the default css, and find a free devno from the
* default css image for it.
* If @p bus_id is valid, and @p squash_mcss is false, verify that it is
* not already in use, and find a free devno for it.
* If @p bus_id is valid, verify that it is not already in use, and find a
* free devno for it.
* If @p bus_id is not valid find a free subchannel id and device number
* across all subchannel sets and all css images starting from the default
* css image.
@ -282,7 +279,7 @@ extern const PropertyInfo css_devid_ro_propinfo;
* The caller becomes owner of the returned subchannel structure and
* is responsible for unregistering and freeing it.
*/
SubchDev *css_create_sch(CssDevId bus_id, bool squash_mcss, Error **errp);
SubchDev *css_create_sch(CssDevId bus_id, Error **errp);
/** Turn on css migration */
void css_register_vmstate(void);

View File

@ -29,7 +29,6 @@ typedef struct S390CcwMachineState {
bool aes_key_wrap;
bool dea_key_wrap;
uint8_t loadparm[8];
bool s390_squash_mcss;
} S390CcwMachineState;
typedef struct S390CcwMachineClass {

View File

@ -28,6 +28,7 @@
#define KVM_FEATURE_PV_UNHALT 7
#define KVM_FEATURE_PV_TLB_FLUSH 9
#define KVM_FEATURE_ASYNC_PF_VMEXIT 10
#define KVM_FEATURE_PV_SEND_IPI 11
#define KVM_HINTS_REALTIME 0

View File

@ -182,6 +182,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
/* add more to the end as needed */
#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
@ -297,6 +298,19 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
/*
* Qualcomm Compressed Format
*
* Refers to a compressed variant of the base format that is compressed.
* Implementation may be platform and base-format specific.
*
* Each macrotile consists of m x n (mostly 4 x 4) tiles.
* Pixel data pitch/stride is aligned with macrotile width.
* Pixel data height is aligned with macrotile height.
* Entire pixel data buffer is aligned with 4k(bytes).
*/
#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
/* Vivante framebuffer modifiers */
/*
@ -383,6 +397,23 @@ extern "C" {
#define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB \
fourcc_mod_code(NVIDIA, 0x15)
/*
* Some Broadcom modifiers take parameters, for example the number of
* vertical lines in the image. Reserve the lower 32 bits for modifier
* type, and the next 24 bits for parameters. Top 8 bits are the
* vendor code.
*/
#define __fourcc_mod_broadcom_param_shift 8
#define __fourcc_mod_broadcom_param_bits 48
#define fourcc_mod_broadcom_code(val, params) \
fourcc_mod_code(BROADCOM, ((((uint64_t)params) << __fourcc_mod_broadcom_param_shift) | val))
#define fourcc_mod_broadcom_param(m) \
((int)(((m) >> __fourcc_mod_broadcom_param_shift) & \
((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
#define fourcc_mod_broadcom_mod(m) \
((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << \
__fourcc_mod_broadcom_param_shift))
/*
* Broadcom VC4 "T" format
*
@ -404,6 +435,151 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)
/*
* Broadcom SAND format
*
* This is the native format that the H.264 codec block uses. For VC4
* HVS, it is only valid for H.264 (NV12/21) and RGBA modes.
*
* The image can be considered to be split into columns, and the
* columns are placed consecutively into memory. The width of those
* columns can be either 32, 64, 128, or 256 pixels, but in practice
* only 128 pixel columns are used.
*
* The pitch between the start of each column is set to optimally
* switch between SDRAM banks. This is passed as the number of lines
* of column width in the modifier (we can't use the stride value due
* to various core checks that look at it , so you should set the
* stride to width*cpp).
*
* Note that the column height for this format modifier is the same
* for all of the planes, assuming that each column contains both Y
* and UV. Some SAND-using hardware stores UV in a separate tiled
* image from Y to reduce the column height, which is not supported
* with these modifiers.
*/
#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(2, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(3, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(4, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \
fourcc_mod_broadcom_code(5, v)
#define DRM_FORMAT_MOD_BROADCOM_SAND32 \
DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND64 \
DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND128 \
DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0)
#define DRM_FORMAT_MOD_BROADCOM_SAND256 \
DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0)
/* Broadcom UIF format
*
* This is the common format for the current Broadcom multimedia
* blocks, including V3D 3.x and newer, newer video codecs, and
* displays.
*
* The image consists of utiles (64b blocks), UIF blocks (2x2 utiles),
* and macroblocks (4x4 UIF blocks). Those 4x4 UIF block groups are
* stored in columns, with padding between the columns to ensure that
* moving from one column to the next doesn't hit the same SDRAM page
* bank.
*
* To calculate the padding, it is assumed that each hardware block
* and the software driving it knows the platform's SDRAM page size,
* number of banks, and XOR address, and that it's identical between
* all blocks using the format. This tiling modifier will use XOR as
* necessary to reduce the padding. If a hardware block can't do XOR,
* the assumption is that a no-XOR tiling modifier will be created.
*/
#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
/*
* Arm Framebuffer Compression (AFBC) modifiers
*
* AFBC is a proprietary lossless image compression protocol and format.
* It provides fine-grained random access and minimizes the amount of data
* transferred between IP blocks.
*
* AFBC has several features which may be supported and/or used, which are
* represented using bits in the modifier. Not all combinations are valid,
* and different devices or use-cases may support different combinations.
*/
#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode)
/*
* AFBC superblock size
*
* Indicates the superblock size(s) used for the AFBC buffer. The buffer
* size (in pixels) must be aligned to a multiple of the superblock size.
* Four lowest significant bits(LSBs) are reserved for block size.
*/
#define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf
#define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL)
#define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL)
/*
* AFBC lossless colorspace transform
*
* Indicates that the buffer makes use of the AFBC lossless colorspace
* transform.
*/
#define AFBC_FORMAT_MOD_YTR (1ULL << 4)
/*
* AFBC block-split
*
* Indicates that the payload of each superblock is split. The second
* half of the payload is positioned at a predefined offset from the start
* of the superblock payload.
*/
#define AFBC_FORMAT_MOD_SPLIT (1ULL << 5)
/*
* AFBC sparse layout
*
* This flag indicates that the payload of each superblock must be stored at a
* predefined position relative to the other superblocks in the same AFBC
* buffer. This order is the same order used by the header buffer. In this mode
* each superblock is given the same amount of space as an uncompressed
* superblock of the particular format would require, rounding up to the next
* multiple of 128 bytes in size.
*/
#define AFBC_FORMAT_MOD_SPARSE (1ULL << 6)
/*
* AFBC copy-block restrict
*
* Buffers with this flag must obey the copy-block restriction. The restriction
* is such that there are no copy-blocks referring across the border of 8x8
* blocks. For the subsampled data the 8x8 limitation is also subsampled.
*/
#define AFBC_FORMAT_MOD_CBR (1ULL << 7)
/*
* AFBC tiled layout
*
* The tiled layout groups superblocks in 8x8 or 4x4 tiles, where all
* superblocks inside a tile are stored together in memory. 8x8 tiles are used
* for pixel formats up to and including 32 bpp while 4x4 tiles are used for
* larger bpp formats. The order between the tiles is scan line.
* When the tiled layout is used, the buffer size (in pixels) must be aligned
* to the tile size.
*/
#define AFBC_FORMAT_MOD_TILED (1ULL << 8)
/*
* AFBC solid color blocks
*
* Indicates that the buffer makes use of solid-color blocks, whereby bandwidth
* can be reduced if a whole superblock is a single color.
*/
#define AFBC_FORMAT_MOD_SC (1ULL << 9)
#if defined(__cplusplus)
}
#endif

View File

@ -226,7 +226,7 @@ enum tunable_id {
ETHTOOL_TX_COPYBREAK,
ETHTOOL_PFC_PREVENTION_TOUT, /* timeout in msecs */
/*
* Add your fresh new tubale attribute above and remember to update
* Add your fresh new tunable attribute above and remember to update
* tunable_strings[] in net/core/ethtool.c
*/
__ETHTOOL_TUNABLE_COUNT,
@ -870,7 +870,8 @@ struct ethtool_flow_ext {
* includes the %FLOW_EXT or %FLOW_MAC_EXT flag
* (see &struct ethtool_flow_ext description).
* @ring_cookie: RX ring/queue index to deliver to, or %RX_CLS_FLOW_DISC
* if packets should be discarded
* if packets should be discarded, or %RX_CLS_FLOW_WAKE if the
* packets should be used for Wake-on-LAN with %WAKE_FILTER
* @location: Location of rule in the table. Locations must be
* numbered such that a flow matching multiple rules will be
* classified according to the first (lowest numbered) rule.
@ -902,13 +903,13 @@ struct ethtool_rx_flow_spec {
static inline uint64_t ethtool_get_flow_spec_ring(uint64_t ring_cookie)
{
return ETHTOOL_RX_FLOW_SPEC_RING & ring_cookie;
};
}
static inline uint64_t ethtool_get_flow_spec_ring_vf(uint64_t ring_cookie)
{
return (ETHTOOL_RX_FLOW_SPEC_RING_VF & ring_cookie) >>
ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
};
}
/**
* struct ethtool_rxnfc - command to get or set RX flow classification rules
@ -1634,6 +1635,7 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
#define WAKE_ARP (1 << 4)
#define WAKE_MAGIC (1 << 5)
#define WAKE_MAGICSECURE (1 << 6) /* only meaningful if WAKE_MAGIC */
#define WAKE_FILTER (1 << 7)
/* L2-L4 network traffic flow types */
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
@ -1671,6 +1673,7 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
#define RXH_DISCARD (1 << 31)
#define RX_CLS_FLOW_DISC 0xffffffffffffffffULL
#define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL
/* Special RX classification rule insert location values */
#define RX_CLS_LOC_SPECIAL 0x80000000 /* flag */

View File

@ -636,6 +636,7 @@
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
#define PCI_EXP_DEVCAP2_EE_PREFIX 0x00200000 /* End-End TLP Prefix */
#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f /* Completion Timeout Value */
#define PCI_EXP_DEVCTL2_COMP_TMOUT_DIS 0x0010 /* Completion Timeout Disable */
@ -960,8 +961,9 @@
#define PCI_REBAR_CTRL 8 /* control register */
#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */
#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */
#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */
#define PCI_REBAR_CTRL_BAR_SHIFT 8 /* shift for BAR size */
/* Dynamic Power Allocation */
#define PCI_DPA_CAP 4 /* capability register */

View File

@ -45,11 +45,14 @@
/* We've given up on this device. */
#define VIRTIO_CONFIG_S_FAILED 0x80
/* Some virtio feature bits (currently bits 28 through 32) are reserved for the
* transport being used (eg. virtio_ring), the rest are per-device feature
* bits. */
/*
* Virtio feature bits VIRTIO_TRANSPORT_F_START through
* VIRTIO_TRANSPORT_F_END are reserved for the transport
* being used (e.g. virtio_ring, virtio_pci etc.), the
* rest are per-device feature bits.
*/
#define VIRTIO_TRANSPORT_F_START 28
#define VIRTIO_TRANSPORT_F_END 34
#define VIRTIO_TRANSPORT_F_END 38
#ifndef VIRTIO_CONFIG_NO_LEGACY
/* Do we get callbacks when the ring is completely used, even if we've
@ -71,4 +74,9 @@
* this is for compatibility with legacy systems.
*/
#define VIRTIO_F_IOMMU_PLATFORM 33
/*
* Does the device support Single Root I/O Virtualization?
*/
#define VIRTIO_F_SR_IOV 37
#endif /* _LINUX_VIRTIO_CONFIG_H */

View File

@ -734,9 +734,11 @@ __SYSCALL(__NR_pkey_free, sys_pkey_free)
__SYSCALL(__NR_statx, sys_statx)
#define __NR_io_pgetevents 292
__SC_COMP(__NR_io_pgetevents, sys_io_pgetevents, compat_sys_io_pgetevents)
#define __NR_rseq 293
__SYSCALL(__NR_rseq, sys_rseq)
#undef __NR_syscalls
#define __NR_syscalls 293
#define __NR_syscalls 294
/*
* 32 bit systems traditionally used different

View File

@ -388,17 +388,19 @@
#define __NR_pkey_alloc (__NR_Linux + 364)
#define __NR_pkey_free (__NR_Linux + 365)
#define __NR_statx (__NR_Linux + 366)
#define __NR_rseq (__NR_Linux + 367)
#define __NR_io_pgetevents (__NR_Linux + 368)
/*
* Offset of the last Linux o32 flavoured syscall
*/
#define __NR_Linux_syscalls 366
#define __NR_Linux_syscalls 368
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
#define __NR_O32_Linux_syscalls 366
#define __NR_O32_Linux_syscalls 368
#if _MIPS_SIM == _MIPS_SIM_ABI64
@ -733,16 +735,18 @@
#define __NR_pkey_alloc (__NR_Linux + 324)
#define __NR_pkey_free (__NR_Linux + 325)
#define __NR_statx (__NR_Linux + 326)
#define __NR_rseq (__NR_Linux + 327)
#define __NR_io_pgetevents (__NR_Linux + 328)
/*
* Offset of the last Linux 64-bit flavoured syscall
*/
#define __NR_Linux_syscalls 326
#define __NR_Linux_syscalls 328
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
#define __NR_64_Linux_syscalls 326
#define __NR_64_Linux_syscalls 328
#if _MIPS_SIM == _MIPS_SIM_NABI32
@ -1081,15 +1085,17 @@
#define __NR_pkey_alloc (__NR_Linux + 328)
#define __NR_pkey_free (__NR_Linux + 329)
#define __NR_statx (__NR_Linux + 330)
#define __NR_rseq (__NR_Linux + 331)
#define __NR_io_pgetevents (__NR_Linux + 332)
/*
* Offset of the last N32 flavoured syscall
*/
#define __NR_Linux_syscalls 330
#define __NR_Linux_syscalls 332
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
#define __NR_N32_Linux_syscalls 330
#define __NR_N32_Linux_syscalls 332
#endif /* _ASM_UNISTD_H */

View File

@ -633,6 +633,7 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_PSSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbd)
#define KVM_REG_PPC_DEC_EXPIRY (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbe)
#define KVM_REG_PPC_ONLINE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs

View File

@ -399,5 +399,6 @@
#define __NR_pkey_free 385
#define __NR_pkey_mprotect 386
#define __NR_rseq 387
#define __NR_io_pgetevents 388
#endif /* _ASM_POWERPC_UNISTD_H_ */

View File

@ -4,7 +4,7 @@
/*
* KVM s390 specific structures and definitions
*
* Copyright IBM Corp. 2008
* Copyright IBM Corp. 2008, 2018
*
* Author(s): Carsten Otte <cotte@de.ibm.com>
* Christian Borntraeger <borntraeger@de.ibm.com>
@ -225,6 +225,7 @@ struct kvm_guest_debug_arch {
#define KVM_SYNC_FPRS (1UL << 8)
#define KVM_SYNC_GSCB (1UL << 9)
#define KVM_SYNC_BPBC (1UL << 10)
#define KVM_SYNC_ETOKEN (1UL << 11)
/* length and alignment of the sdnx as a power of two */
#define SDNXC 8
#define SDNXL (1UL << SDNXC)
@ -258,6 +259,8 @@ struct kvm_sync_regs {
struct {
__u64 reserved1[2];
__u64 gscb[4];
__u64 etoken;
__u64 etoken_extension;
};
};
};

View File

@ -361,5 +361,7 @@
#define __NR_statx 379
#define __NR_s390_sthyi 380
#define __NR_kexec_file_load 381
#define __NR_io_pgetevents 382
#define __NR_rseq 383
#endif /* _ASM_S390_UNISTD_32_H */

View File

@ -328,5 +328,7 @@
#define __NR_statx 379
#define __NR_s390_sthyi 380
#define __NR_kexec_file_load 381
#define __NR_io_pgetevents 382
#define __NR_rseq 383
#endif /* _ASM_S390_UNISTD_64_H */

View File

@ -378,4 +378,41 @@ struct kvm_sync_regs {
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
struct kvm_vmx_nested_state {
__u64 vmxon_pa;
__u64 vmcs_pa;
struct {
__u16 flags;
} smm;
};
/* for KVM_CAP_NESTED_STATE */
struct kvm_nested_state {
/* KVM_STATE_* flags */
__u16 flags;
/* 0 for VMX, 1 for SVM. */
__u16 format;
/* 128 for SVM, 128 + VMCS size for VMX. */
__u32 size;
union {
/* VMXON, VMCS */
struct kvm_vmx_nested_state vmx;
/* Pad the header to 128 bytes. */
__u8 pad[120];
};
__u8 data[0];
};
#endif /* _ASM_X86_KVM_H */

View File

@ -949,6 +949,8 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_GET_MSR_FEATURES 153
#define KVM_CAP_HYPERV_EVENTFD 154
#define KVM_CAP_HYPERV_TLBFLUSH 155
#define KVM_CAP_S390_HPAGE_1M 156
#define KVM_CAP_NESTED_STATE 157
#ifdef KVM_CAP_IRQ_ROUTING
@ -1391,6 +1393,9 @@ struct kvm_enc_region {
/* Available with KVM_CAP_HYPERV_EVENTFD */
#define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd)
/* Available with KVM_CAP_NESTED_STATE */
#define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state)
#define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state)
/* Secure Encrypted Virtualization command */
enum sev_cmd_id {

View File

@ -65,6 +65,7 @@ struct vhost_iotlb_msg {
};
#define VHOST_IOTLB_MSG 0x1
#define VHOST_IOTLB_MSG_V2 0x2
struct vhost_msg {
int type;
@ -74,6 +75,15 @@ struct vhost_msg {
};
};
struct vhost_msg_v2 {
__u32 type;
__u32 reserved;
union {
struct vhost_iotlb_msg iotlb;
__u8 padding[64];
};
};
struct vhost_memory_region {
__u64 guest_phys_addr;
__u64 memory_size; /* bytes */
@ -160,6 +170,14 @@ struct vhost_memory {
#define VHOST_GET_VRING_BUSYLOOP_TIMEOUT _IOW(VHOST_VIRTIO, 0x24, \
struct vhost_vring_state)
/* Set or get vhost backend capability */
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
#define VHOST_SET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x25, __u64)
#define VHOST_GET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x26, __u64)
/* VHOST_NET specific defines */
/* Attach virtio net ring to a raw socket, or tap device.

View File

@ -111,14 +111,6 @@ The ``-nodefconfig`` argument is a synonym for ``-no-user-config``.
The @option{--balloon virtio} argument has been superseded by
@option{--device virtio-balloon}.
@subsection -machine s390-squash-mcss=on|off (since 2.12.0)
The ``s390-squash-mcss=on`` property has been obsoleted by allowing the
cssid to be chosen freely. Instead of squashing subchannels into the
default channel subsystem image for guests that do not support multiple
channel subsystems, all devices can be put into the default channel
subsystem image.
@subsection -fsdev handle (since 2.12.0)
The ``handle'' fsdev backend does not support symlinks and causes the 9p

View File

@ -43,7 +43,6 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \
" suppress-vmdesc=on|off disables self-describing migration (default=off)\n"
" nvdimm=on|off controls NVDIMM support (default=off)\n"
" enforce-config-section=on|off enforce configuration section migration (default=off)\n"
" s390-squash-mcss=on|off (deprecated) controls support for squashing into default css (default=off)\n"
" memory-encryption=@var{} memory encryption object to use (default=none)\n",
QEMU_ARCH_ALL)
STEXI
@ -96,15 +95,6 @@ controls whether DEA wrapping keys will be created to allow
execution of DEA cryptographic functions. The default is on.
@item nvdimm=on|off
Enables or disables NVDIMM support. The default is off.
@item s390-squash-mcss=on|off
Enables or disables squashing subchannels into the default css.
The default is off.
NOTE: This property is deprecated and will be removed in future releases.
The ``s390-squash-mcss=on`` property has been obsoleted by allowing the
cssid to be chosen freely. Instead of squashing subchannels into the
default channel subsystem image for guests that do not support multiple
channel subsystems, all devices can be put into the default channel
subsystem image.
@item enforce-config-section=on|off
If @option{enforce-config-section} is set to @var{on}, force migration
code to send configuration section even if the machine-type sets the

View File

@ -421,16 +421,6 @@ void s390_crypto_reset(void)
}
}
bool s390_get_squash_mcss(void)
{
if (object_property_get_bool(OBJECT(qdev_get_machine()), "s390-squash-mcss",
NULL)) {
return true;
}
return false;
}
void s390_enable_css_support(S390CPU *cpu)
{
if (kvm_enabled()) {

View File

@ -2,6 +2,7 @@
* S/390 virtual CPU header
*
* Copyright (c) 2009 Ulrich Hecht
* Copyright IBM Corp. 2012, 2018
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@ -68,6 +69,8 @@ struct CPUS390XState {
uint32_t aregs[16]; /* access registers */
uint8_t riccb[64]; /* runtime instrumentation control */
uint64_t gscb[4]; /* guarded storage control */
uint64_t etoken; /* etoken */
uint64_t etoken_extension; /* etoken extension */
/* Fields up to this point are not cleared by initial CPU reset */
struct {} start_initial_reset_fields;
@ -713,7 +716,6 @@ static inline void s390_do_cpu_load_normal(CPUState *cs, run_on_cpu_data arg)
/* cpu.c */
void s390_crypto_reset(void);
bool s390_get_squash_mcss(void);
int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit);
void s390_cmma_reset(void);
void s390_enable_css_support(S390CPU *cpu);

View File

@ -1,7 +1,7 @@
/*
* CPU features/facilities for s390x
*
* Copyright 2016 IBM Corp.
* Copyright IBM Corp. 2016, 2018
*
* Author(s): David Hildenbrand <dahi@linux.vnet.ibm.com>
*
@ -13,7 +13,6 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "cpu_features.h"
#include "gen-features.h"
#define FEAT_INIT(_name, _type, _bit, _desc) \
{ \
@ -106,6 +105,7 @@ static const S390FeatDef s390_features[] = {
FEAT_INIT("irbm", S390_FEAT_TYPE_STFL, 145, "Insert-reference-bits-multiple facility"),
FEAT_INIT("msa8-base", S390_FEAT_TYPE_STFL, 146, "Message-security-assist-extension-8 facility (excluding subfunctions)"),
FEAT_INIT("cmmnt", S390_FEAT_TYPE_STFL, 147, "CMM: ESSA-enhancement (no translate) facility"),
FEAT_INIT("etoken", S390_FEAT_TYPE_STFL, 156, "Etoken facility"),
/* SCLP SCCB Byte 80 - 98 (bit numbers relative to byte-80) */
FEAT_INIT("gsls", S390_FEAT_TYPE_SCLP_CONF_CHAR, 40, "SIE: Guest-storage-limit-suppression facility"),

View File

@ -16,6 +16,7 @@
#include "qemu/bitmap.h"
#include "cpu_features_def.h"
#include "gen-features.h"
/* CPU features are announced via different ways */
typedef enum {
@ -64,24 +65,6 @@ void s390_add_from_feat_block(S390FeatBitmap features, S390FeatType type,
void s390_feat_bitmap_to_ascii(const S390FeatBitmap features, void *opaque,
void (*fn)(const char *name, void *opaque));
/* static groups that will never change */
typedef enum {
S390_FEAT_GROUP_PLO,
S390_FEAT_GROUP_TOD_CLOCK_STEERING,
S390_FEAT_GROUP_GEN13_PTFF_ENH,
S390_FEAT_GROUP_MSA,
S390_FEAT_GROUP_MSA_EXT_1,
S390_FEAT_GROUP_MSA_EXT_2,
S390_FEAT_GROUP_MSA_EXT_3,
S390_FEAT_GROUP_MSA_EXT_4,
S390_FEAT_GROUP_MSA_EXT_5,
S390_FEAT_GROUP_MSA_EXT_6,
S390_FEAT_GROUP_MSA_EXT_7,
S390_FEAT_GROUP_MSA_EXT_8,
S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF,
S390_FEAT_GROUP_MAX,
} S390FeatGroup;
/* Definition of a CPU feature group */
typedef struct {
const char *name; /* name exposed to the user */

View File

@ -1,7 +1,7 @@
/*
* CPU features/facilities for s390
*
* Copyright 2016 IBM Corp.
* Copyright IBM Corp. 2016, 2018
*
* Author(s): Michael Mueller <mimu@linux.vnet.ibm.com>
* David Hildenbrand <dahi@linux.vnet.ibm.com>
@ -93,6 +93,7 @@ typedef enum {
S390_FEAT_INSERT_REFERENCE_BITS_MULT,
S390_FEAT_MSA_EXT_8,
S390_FEAT_CMM_NT,
S390_FEAT_ETOKEN,
/* Sclp Conf Char */
S390_FEAT_SIE_GSLS,

View File

@ -307,7 +307,10 @@ static gint s390_cpu_list_compare(gconstpointer a, gconstpointer b)
const char *name_a = object_class_get_name((ObjectClass *)a);
const char *name_b = object_class_get_name((ObjectClass *)b);
/* move qemu and host to the top of the list, qemu first, host second */
/*
* Move qemu, host and max to the top of the list, qemu first, host second,
* max third.
*/
if (name_a[0] == 'q') {
return -1;
} else if (name_b[0] == 'q') {
@ -316,6 +319,10 @@ static gint s390_cpu_list_compare(gconstpointer a, gconstpointer b)
return -1;
} else if (name_b[0] == 'h') {
return 1;
} else if (name_a[0] == 'm') {
return -1;
} else if (name_b[0] == 'm') {
return 1;
}
/* keep the same order we have in our table (sorted by release date) */
@ -1077,27 +1084,6 @@ static void s390_cpu_model_initfn(Object *obj)
}
}
#ifdef CONFIG_KVM
static void s390_host_cpu_model_initfn(Object *obj)
{
S390CPU *cpu = S390_CPU(obj);
Error *err = NULL;
if (!kvm_enabled() || !kvm_s390_cpu_models_supported()) {
return;
}
cpu->model = g_malloc0(sizeof(*cpu->model));
kvm_s390_get_host_cpu_model(cpu->model, &err);
if (err) {
error_report_err(err);
g_free(cpu->model);
/* fallback to unsupported cpu models */
cpu->model = NULL;
}
}
#endif
static S390CPUDef s390_qemu_cpu_def;
static S390CPUModel s390_qemu_cpu_model;
@ -1136,6 +1122,31 @@ static void s390_qemu_cpu_model_initfn(Object *obj)
memcpy(cpu->model, &s390_qemu_cpu_model, sizeof(*cpu->model));
}
static void s390_max_cpu_model_initfn(Object *obj)
{
const S390CPUModel *max_model;
S390CPU *cpu = S390_CPU(obj);
Error *local_err = NULL;
if (kvm_enabled() && !kvm_s390_cpu_models_supported()) {
/* "max" and "host" always work, even without CPU model support */
return;
}
max_model = get_max_cpu_model(&local_err);
if (local_err) {
/* we expect errors only under KVM, when actually querying the kernel */
g_assert(kvm_enabled());
error_report_err(local_err);
/* fallback to unsupported CPU models */
return;
}
cpu->model = g_new(S390CPUModel, 1);
/* copy the CPU model so we can modify it */
memcpy(cpu->model, max_model, sizeof(*cpu->model));
}
static void s390_cpu_model_finalize(Object *obj)
{
S390CPU *cpu = S390_CPU(obj);
@ -1209,6 +1220,20 @@ static void s390_qemu_cpu_model_class_init(ObjectClass *oc, void *data)
qemu_hw_version());
}
static void s390_max_cpu_model_class_init(ObjectClass *oc, void *data)
{
S390CPUClass *xcc = S390_CPU_CLASS(oc);
/*
* The "max" model is neither static nor migration safe. Under KVM
* it represents the "host" model. Under TCG it represents some kind of
* "qemu" CPU model without compat handling and maybe with some additional
* CPU features that are not yet unlocked in the "qemu" model.
*/
xcc->desc =
"Enables all features supported by the accelerator in the current host";
}
/* Generate type name for a cpu model. Caller has to free the string. */
static char *s390_cpu_type_name(const char *model_name)
{
@ -1239,12 +1264,18 @@ static const TypeInfo qemu_s390_cpu_type_info = {
.class_init = s390_qemu_cpu_model_class_init,
};
static const TypeInfo max_s390_cpu_type_info = {
.name = S390_CPU_TYPE_NAME("max"),
.parent = TYPE_S390_CPU,
.instance_init = s390_max_cpu_model_initfn,
.instance_finalize = s390_cpu_model_finalize,
.class_init = s390_max_cpu_model_class_init,
};
#ifdef CONFIG_KVM
static const TypeInfo host_s390_cpu_type_info = {
.name = S390_CPU_TYPE_NAME("host"),
.parent = TYPE_S390_CPU,
.instance_init = s390_host_cpu_model_initfn,
.instance_finalize = s390_cpu_model_finalize,
.parent = S390_CPU_TYPE_NAME("max"),
.class_init = s390_host_cpu_model_class_init,
};
#endif
@ -1326,6 +1357,7 @@ static void register_types(void)
}
type_register_static(&qemu_s390_cpu_type_info);
type_register_static(&max_s390_cpu_type_info);
#ifdef CONFIG_KVM
type_register_static(&host_s390_cpu_type_info);
#endif

View File

@ -1,7 +1,7 @@
/*
* S390 feature list generator
*
* Copyright 2016 IBM Corp.
* Copyright IBM Corp. 2016, 2018
*
* Author(s): Michael Mueller <mimu@linux.vnet.ibm.com>
* David Hildenbrand <dahi@linux.vnet.ibm.com>
@ -471,6 +471,7 @@ static uint16_t full_GEN14_GA1[] = {
S390_FEAT_GROUP_MSA_EXT_7,
S390_FEAT_GROUP_MSA_EXT_8,
S390_FEAT_CMM_NT,
S390_FEAT_ETOKEN,
S390_FEAT_HPMA2,
S390_FEAT_SIE_KSS,
S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF,
@ -661,6 +662,7 @@ static CpuFeatDefSpec CpuFeatDef[] = {
#define FEAT_GROUP_INITIALIZER(_name) \
{ \
.name = "S390_FEAT_GROUP_LIST_" #_name, \
.enum_name = "S390_FEAT_GROUP_" #_name, \
.bits = \
{ .data = group_##_name, \
.len = ARRAY_SIZE(group_##_name) }, \
@ -668,6 +670,7 @@ static CpuFeatDefSpec CpuFeatDef[] = {
typedef struct {
const char *name;
const char *enum_name;
BitSpec bits;
} FeatGroupDefSpec;
@ -678,7 +681,6 @@ static FeatGroupDefSpec FeatGroupDef[] = {
FEAT_GROUP_INITIALIZER(PLO),
FEAT_GROUP_INITIALIZER(TOD_CLOCK_STEERING),
FEAT_GROUP_INITIALIZER(GEN13_PTFF),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
FEAT_GROUP_INITIALIZER(MSA),
FEAT_GROUP_INITIALIZER(MSA_EXT_1),
FEAT_GROUP_INITIALIZER(MSA_EXT_2),
@ -688,6 +690,7 @@ static FeatGroupDefSpec FeatGroupDef[] = {
FEAT_GROUP_INITIALIZER(MSA_EXT_6),
FEAT_GROUP_INITIALIZER(MSA_EXT_7),
FEAT_GROUP_INITIALIZER(MSA_EXT_8),
FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
};
#define QEMU_FEAT_INITIALIZER(_name) \
@ -810,6 +813,19 @@ static void print_feature_group_defs(void)
}
}
static void print_feature_group_enum_type(void)
{
int i;
printf("\n/* CPU feature group enum type */\n"
"typedef enum {\n");
for (i = 0; i < ARRAY_SIZE(FeatGroupDef); i++) {
printf("\t%s,\n", FeatGroupDef[i].enum_name);
}
printf("\tS390_FEAT_GROUP_MAX,\n"
"} S390FeatGroup;\n");
}
int main(int argc, char *argv[])
{
printf("/*\n"
@ -826,6 +842,7 @@ int main(int argc, char *argv[])
print_feature_defs();
print_feature_group_defs();
print_qemu_feature_defs();
print_feature_group_enum_type();
printf("\n#endif\n");
return 0;
}

View File

@ -34,6 +34,8 @@
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
#include "qemu/units.h"
#include "qemu/mmap-alloc.h"
#include "sysemu/sysemu.h"
#include "sysemu/hw_accel.h"
#include "hw/hw.h"
@ -139,6 +141,7 @@ static int cap_mem_op;
static int cap_s390_irq;
static int cap_ri;
static int cap_gs;
static int cap_hpage_1m;
static int active_cmma;
@ -220,9 +223,9 @@ static void kvm_s390_enable_cmma(void)
.attr = KVM_S390_VM_MEM_ENABLE_CMMA,
};
if (mem_path) {
if (cap_hpage_1m) {
warn_report("CMM will not be enabled because it is not "
"compatible with hugetlbfs.");
"compatible with huge memory backings.");
return;
}
rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr);
@ -281,10 +284,38 @@ void kvm_s390_crypto_reset(void)
}
}
static int kvm_s390_configure_mempath_backing(KVMState *s)
{
size_t path_psize = qemu_mempath_getpagesize(mem_path);
if (path_psize == 4 * KiB) {
return 0;
}
if (path_psize != 1 * MiB) {
error_report("Memory backing with 2G pages was specified, "
"but KVM does not support this memory backing");
return -EINVAL;
}
if (kvm_vm_enable_cap(s, KVM_CAP_S390_HPAGE_1M, 0)) {
error_report("Memory backing with 1M pages was specified, "
"but KVM does not support this memory backing");
return -EINVAL;
}
cap_hpage_1m = 1;
return 0;
}
int kvm_arch_init(MachineState *ms, KVMState *s)
{
MachineClass *mc = MACHINE_GET_CLASS(ms);
if (mem_path && kvm_s390_configure_mempath_backing(s)) {
return -EINVAL;
}
mc->default_cpu_type = S390_CPU_TYPE_NAME("host");
cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS);
cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF);
@ -493,6 +524,12 @@ int kvm_arch_put_registers(CPUState *cs, int level)
cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_BPBC;
}
if (can_sync_regs(cs, KVM_SYNC_ETOKEN)) {
cs->kvm_run->s.regs.etoken = env->etoken;
cs->kvm_run->s.regs.etoken_extension = env->etoken_extension;
cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ETOKEN;
}
/* Finally the prefix */
if (can_sync_regs(cs, KVM_SYNC_PREFIX)) {
cs->kvm_run->s.regs.prefix = env->psa;
@ -607,6 +644,11 @@ int kvm_arch_get_registers(CPUState *cs)
env->bpbc = cs->kvm_run->s.regs.bpbc;
}
if (can_sync_regs(cs, KVM_SYNC_ETOKEN)) {
env->etoken = cs->kvm_run->s.regs.etoken;
env->etoken_extension = cs->kvm_run->s.regs.etoken_extension;
}
/* pfault parameters */
if (can_sync_regs(cs, KVM_SYNC_PFAULT)) {
env->pfault_token = cs->kvm_run->s.regs.pft;

View File

@ -1,7 +1,7 @@
/*
* S390x machine definitions and functions
*
* Copyright IBM Corp. 2014
* Copyright IBM Corp. 2014, 2018
*
* Authors:
* Thomas Huth <thuth@linux.vnet.ibm.com>
@ -216,6 +216,23 @@ const VMStateDescription vmstate_bpbc = {
}
};
static bool etoken_needed(void *opaque)
{
return s390_has_feat(S390_FEAT_ETOKEN);
}
const VMStateDescription vmstate_etoken = {
.name = "cpu/etoken",
.version_id = 1,
.minimum_version_id = 1,
.needed = etoken_needed,
.fields = (VMStateField[]) {
VMSTATE_UINT64(env.etoken, S390CPU),
VMSTATE_UINT64(env.etoken_extension, S390CPU),
VMSTATE_END_OF_LIST()
}
};
const VMStateDescription vmstate_s390_cpu = {
.name = "cpu",
.post_load = cpu_post_load,
@ -251,6 +268,7 @@ const VMStateDescription vmstate_s390_cpu = {
&vmstate_exval,
&vmstate_gscb,
&vmstate_bpbc,
&vmstate_etoken,
NULL
},
};