cputlb: Expand cpu_ldst_template.h in cputlb.c
Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. The result is only slightly smaller than the original. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
ecc067d792
commit
cfe04a4b6e
@ -35,7 +35,6 @@
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#include "qemu/atomic128.h"
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#include "translate-all.h"
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#include "trace-root.h"
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#include "qemu/plugin.h"
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#include "trace/mem.h"
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#ifdef CONFIG_PLUGIN
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#include "qemu/plugin-memory.h"
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@ -1697,6 +1696,68 @@ uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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? helper_le_ldq_mmu : helper_be_ldq_mmu);
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}
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uint32_t cpu_ldub_data_ra(CPUArchState *env, target_ulong ptr,
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uintptr_t retaddr)
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{
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return cpu_ldub_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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int cpu_ldsb_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr)
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{
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return cpu_ldsb_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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uint32_t cpu_lduw_data_ra(CPUArchState *env, target_ulong ptr,
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uintptr_t retaddr)
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{
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return cpu_lduw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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int cpu_ldsw_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr)
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{
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return cpu_ldsw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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uint32_t cpu_ldl_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr)
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{
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return cpu_ldl_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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uint64_t cpu_ldq_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr)
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{
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return cpu_ldq_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr);
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}
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uint32_t cpu_ldub_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_ldub_data_ra(env, ptr, 0);
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}
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int cpu_ldsb_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_ldsb_data_ra(env, ptr, 0);
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}
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uint32_t cpu_lduw_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_lduw_data_ra(env, ptr, 0);
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}
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int cpu_ldsw_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_ldsw_data_ra(env, ptr, 0);
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}
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uint32_t cpu_ldl_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_ldl_data_ra(env, ptr, 0);
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}
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uint64_t cpu_ldq_data(CPUArchState *env, target_ulong ptr)
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{
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return cpu_ldq_data_ra(env, ptr, 0);
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}
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/*
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* Store Helpers
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*/
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@ -1970,6 +2031,50 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val,
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cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEQ);
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}
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void cpu_stb_data_ra(CPUArchState *env, target_ulong ptr,
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uint32_t val, uintptr_t retaddr)
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{
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cpu_stb_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr);
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}
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void cpu_stw_data_ra(CPUArchState *env, target_ulong ptr,
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uint32_t val, uintptr_t retaddr)
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{
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cpu_stw_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr);
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}
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void cpu_stl_data_ra(CPUArchState *env, target_ulong ptr,
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uint32_t val, uintptr_t retaddr)
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{
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cpu_stl_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr);
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}
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void cpu_stq_data_ra(CPUArchState *env, target_ulong ptr,
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uint64_t val, uintptr_t retaddr)
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{
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cpu_stq_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr);
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}
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void cpu_stb_data(CPUArchState *env, target_ulong ptr, uint32_t val)
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{
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cpu_stb_data_ra(env, ptr, val, 0);
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}
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void cpu_stw_data(CPUArchState *env, target_ulong ptr, uint32_t val)
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{
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cpu_stw_data_ra(env, ptr, val, 0);
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}
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void cpu_stl_data(CPUArchState *env, target_ulong ptr, uint32_t val)
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{
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cpu_stl_data_ra(env, ptr, val, 0);
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}
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void cpu_stq_data(CPUArchState *env, target_ulong ptr, uint64_t val)
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{
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cpu_stq_data_ra(env, ptr, val, 0);
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}
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/* First set of helpers allows passing in of OI and RETADDR. This makes
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them callable from other helpers. */
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@ -94,32 +94,6 @@ typedef target_ulong abi_ptr;
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#define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx
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#endif
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#if defined(CONFIG_USER_ONLY)
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extern __thread uintptr_t helper_retaddr;
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static inline void set_helper_retaddr(uintptr_t ra)
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{
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helper_retaddr = ra;
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/*
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* Ensure that this write is visible to the SIGSEGV handler that
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* may be invoked due to a subsequent invalid memory operation.
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*/
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signal_barrier();
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}
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static inline void clear_helper_retaddr(void)
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{
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/*
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* Ensure that previous memory operations have succeeded before
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* removing the data visible to the signal handler.
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*/
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signal_barrier();
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helper_retaddr = 0;
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}
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/* In user-only mode we provide only the _code and _data accessors. */
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uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr);
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uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr);
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uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr);
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@ -148,6 +122,30 @@ void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr,
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void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr,
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uint64_t val, uintptr_t retaddr);
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#if defined(CONFIG_USER_ONLY)
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extern __thread uintptr_t helper_retaddr;
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static inline void set_helper_retaddr(uintptr_t ra)
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{
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helper_retaddr = ra;
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/*
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* Ensure that this write is visible to the SIGSEGV handler that
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* may be invoked due to a subsequent invalid memory operation.
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*/
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signal_barrier();
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}
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static inline void clear_helper_retaddr(void)
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{
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/*
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* Ensure that previous memory operations have succeeded before
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* removing the data visible to the signal handler.
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*/
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signal_barrier();
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helper_retaddr = 0;
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}
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/*
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* Provide the same *_mmuidx_ra interface as for softmmu.
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* The mmu_idx argument is ignored.
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@ -271,23 +269,6 @@ void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
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int mmu_idx, uintptr_t retaddr);
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/* these access are slower, they must be as rare as possible */
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#define CPU_MMU_INDEX (cpu_mmu_index(env, false))
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#define MEMSUFFIX _data
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#define DATA_SIZE 1
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 2
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 4
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#include "exec/cpu_ldst_template.h"
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#define DATA_SIZE 8
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#include "exec/cpu_ldst_template.h"
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#undef CPU_MMU_INDEX
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#undef MEMSUFFIX
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#endif /* defined(CONFIG_USER_ONLY) */
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uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr);
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@ -1,117 +0,0 @@
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/*
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* Software MMU support
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*
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* Generate inline load/store functions for one MMU mode and data
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* size.
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*
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* Generate a store function as well as signed and unsigned loads.
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*
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* Not used directly but included from cpu_ldst.h.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if DATA_SIZE == 8
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#define SUFFIX q
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#define USUFFIX q
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#define DATA_TYPE uint64_t
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#define SHIFT 3
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#elif DATA_SIZE == 4
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#define SUFFIX l
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#define USUFFIX l
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#define DATA_TYPE uint32_t
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#define SHIFT 2
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#elif DATA_SIZE == 2
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#define SUFFIX w
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#define USUFFIX uw
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#define DATA_TYPE uint16_t
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#define DATA_STYPE int16_t
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#define SHIFT 1
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#elif DATA_SIZE == 1
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#define SUFFIX b
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#define USUFFIX ub
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#define DATA_TYPE uint8_t
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#define DATA_STYPE int8_t
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#define SHIFT 0
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#else
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#error unsupported data size
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#endif
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#if DATA_SIZE == 8
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#define RES_TYPE uint64_t
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#else
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#define RES_TYPE uint32_t
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#endif
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/* generic load/store macros */
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static inline RES_TYPE
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glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
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target_ulong ptr,
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uintptr_t retaddr)
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{
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return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX,
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retaddr);
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}
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static inline RES_TYPE
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glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
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{
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return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0);
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}
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#if DATA_SIZE <= 2
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static inline int
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glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
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target_ulong ptr,
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uintptr_t retaddr)
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{
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return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX,
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retaddr);
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}
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static inline int
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glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
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{
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return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0);
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}
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#endif
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/* generic store macro */
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static inline void
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glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
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target_ulong ptr,
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RES_TYPE v, uintptr_t retaddr)
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{
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glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX,
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retaddr);
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}
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static inline void
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glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr,
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RES_TYPE v)
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{
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glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0);
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}
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#undef RES_TYPE
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#undef DATA_TYPE
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#undef DATA_STYPE
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#undef SUFFIX
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#undef USUFFIX
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#undef DATA_SIZE
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#undef SHIFT
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