One bugfix and silent a fallthru warning.
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdNtRuAAoJEOPjLCzercDeVu8QALV4B8h4BVh8TJTWxwmu2FLo XmMESbwDr4tSaqSZXxW1XNEl4sKFEgCSTkE4t5ULGDFIqXH4WENAbArN+zef0gEn LKtJRk0zDTELmYU99fuIfDZTTYZiDfi92NObB51Uk3Qkk1c+DclK+MnBfabl2hNR 0KcdSx3Idna1WaB2nWod9+URdRA//3uwmQBRsiiTCWyw4yXYYIZqRb4NBOH5dDqa Lpl5nL3rDBaubM/I73SwRTTXbvz9BT4A+QKSgsOFPFiui/YgItunGij8f8vRWJ6K 90C0CapYtO5Dysrc6yACTe9ZXFqjosmGSmtZd8WXFh7oM7BLiZnog+6ZaPnTwloR dBHcFFZqY7q3/MDv8j/FkZNYrgE/+VC5CBFTl3FVp/oTrf05uOlNG7pJPWyS0pe3 fr86diBLoLamirgVOig81683SB7LerN763qEs9980DXs9gzLEHIWfDA8VnRITi4O EeCfccYz6eE1kiBmsgw8LZaA/GMlvfPrsDQudYbrWAzPdFC7lCPjFJr1Rep8i+JR ofTXlyvjAlVrIME4KelTwbAClYfCVynTiZZv2QXRZL/9XtzHODm3rk5maPkBiDvB HdVnAnfuMmNDfP3BN4/nD6F0JY9c9OVvSkmDfJI7SSloAq1ghbz3SFkbSrQ046S8 VcUP2136f94pw1euETEN =F4cf -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/philmd-gitlab/tags/pflash-next-20190723' into staging One bugfix and silent a fallthru warning. # gpg: Signature made Tue 23 Jul 2019 10:33:34 BST # gpg: using RSA key E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/pflash-next-20190723: hw/block/pflash_cfi02: Rewrite a fall through comment hw/block/pflash_cfi01: Add missing DeviceReset() handler Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
cec9f94f2d
@ -865,6 +865,24 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
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pfl->cfi_table[0x3f] = 0x01; /* Number of protection fields */
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pfl->cfi_table[0x3f] = 0x01; /* Number of protection fields */
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}
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}
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static void pflash_cfi01_system_reset(DeviceState *dev)
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{
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PFlashCFI01 *pfl = PFLASH_CFI01(dev);
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/*
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* The command 0x00 is not assigned by the CFI open standard,
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* but QEMU historically uses it for the READ_ARRAY command (0xff).
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*/
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pfl->cmd = 0x00;
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pfl->wcycle = 0;
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memory_region_rom_device_set_romd(&pfl->mem, true);
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/*
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* The WSM ready timer occurs at most 150ns after system reset.
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* This model deliberately ignores this delay.
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*/
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pfl->status = 0x80;
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}
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static Property pflash_cfi01_properties[] = {
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static Property pflash_cfi01_properties[] = {
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DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
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DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
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/* num-blocks is the number of blocks actually visible to the guest,
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/* num-blocks is the number of blocks actually visible to the guest,
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@ -909,6 +927,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = pflash_cfi01_system_reset;
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dc->realize = pflash_cfi01_realize;
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dc->realize = pflash_cfi01_realize;
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dc->props = pflash_cfi01_properties;
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dc->props = pflash_cfi01_properties;
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dc->vmsd = &vmstate_pflash;
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dc->vmsd = &vmstate_pflash;
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@ -577,7 +577,7 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
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pfl->cmd = 0x98;
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pfl->cmd = 0x98;
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return;
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return;
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}
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}
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/* No break here */
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/* fall through */
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default:
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default:
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DPRINTF("%s: invalid write for command %02x\n",
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DPRINTF("%s: invalid write for command %02x\n",
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__func__, pfl->cmd);
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__func__, pfl->cmd);
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