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target/tricore: Correctly handle FPU RM from PSW

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when we reconstructed PSW using psw_read(), we were trying to clear the
cached USB bits out of env->PSW. The mask was wrong and we would clear
PSW.RM as well.

when we write the PSW using psw_write() we update the rounding modes in
env->fp_status for softfloat. The order of bits used by TriCore is not
the one used by softfloat.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-4-kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2023-08-28 13:26:43 +02:00
parent 3e2a5107c5
commit ce64babdf6
1 changed files with 16 additions and 2 deletions
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18
target/tricore/helper.c
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@ -120,7 +120,21 @@ void tricore_cpu_list(void)
void fpu_set_state(CPUTriCoreState *env)
{
set_float_rounding_mode(env->PSW & MASK_PSW_FPU_RM, &env->fp_status);
switch (extract32(env->PSW, 24, 2)) {
case 0:
set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
break;
case 1:
set_float_rounding_mode(float_round_up, &env->fp_status);
break;
case 2:
set_float_rounding_mode(float_round_down, &env->fp_status);
break;
case 3:
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
break;
}
set_flush_inputs_to_zero(1, &env->fp_status);
set_flush_to_zero(1, &env->fp_status);
set_default_nan_mode(1, &env->fp_status);
@ -129,7 +143,7 @@ void fpu_set_state(CPUTriCoreState *env)
uint32_t psw_read(CPUTriCoreState *env)
{
/* clear all USB bits */
env->PSW &= 0x6ffffff;
env->PSW &= 0x7ffffff;
/* now set them from the cache */
env->PSW |= ((env->PSW_USB_C != 0) << 31);
env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1);