pl022: Rename pl022_state to PL022State
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
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88c034d5b2
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@ -39,7 +39,7 @@ do { fprintf(stderr, "pl022: error: " fmt , ## __VA_ARGS__);} while (0)
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#define PL022_INT_RX 0x04
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#define PL022_INT_RX 0x04
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#define PL022_INT_TX 0x08
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#define PL022_INT_TX 0x08
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typedef struct {
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typedef struct PL022State {
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SysBusDevice busdev;
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SysBusDevice busdev;
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MemoryRegion iomem;
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MemoryRegion iomem;
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uint32_t cr0;
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uint32_t cr0;
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@ -58,12 +58,12 @@ typedef struct {
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uint16_t rx_fifo[8];
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uint16_t rx_fifo[8];
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qemu_irq irq;
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qemu_irq irq;
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SSIBus *ssi;
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SSIBus *ssi;
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} pl022_state;
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} PL022State;
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static const unsigned char pl022_id[8] =
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static const unsigned char pl022_id[8] =
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{ 0x22, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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{ 0x22, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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static void pl022_update(pl022_state *s)
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static void pl022_update(PL022State *s)
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{
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{
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s->sr = 0;
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s->sr = 0;
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if (s->tx_fifo_len == 0)
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if (s->tx_fifo_len == 0)
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@ -85,7 +85,7 @@ static void pl022_update(pl022_state *s)
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qemu_set_irq(s->irq, (s->is & s->im) != 0);
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qemu_set_irq(s->irq, (s->is & s->im) != 0);
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}
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}
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static void pl022_xfer(pl022_state *s)
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static void pl022_xfer(PL022State *s)
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{
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{
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int i;
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int i;
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int o;
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int o;
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@ -133,7 +133,7 @@ static void pl022_xfer(pl022_state *s)
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static uint64_t pl022_read(void *opaque, hwaddr offset,
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static uint64_t pl022_read(void *opaque, hwaddr offset,
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unsigned size)
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unsigned size)
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{
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{
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pl022_state *s = (pl022_state *)opaque;
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PL022State *s = (PL022State *)opaque;
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int val;
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int val;
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if (offset >= 0xfe0 && offset < 0x1000) {
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if (offset >= 0xfe0 && offset < 0x1000) {
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@ -177,7 +177,7 @@ static uint64_t pl022_read(void *opaque, hwaddr offset,
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static void pl022_write(void *opaque, hwaddr offset,
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static void pl022_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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uint64_t value, unsigned size)
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{
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{
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pl022_state *s = (pl022_state *)opaque;
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PL022State *s = (PL022State *)opaque;
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switch (offset) {
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switch (offset) {
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case 0x00: /* CR0 */
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case 0x00: /* CR0 */
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@ -221,7 +221,7 @@ static void pl022_write(void *opaque, hwaddr offset,
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}
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}
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}
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}
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static void pl022_reset(pl022_state *s)
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static void pl022_reset(PL022State *s)
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{
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{
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s->rx_fifo_len = 0;
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s->rx_fifo_len = 0;
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s->tx_fifo_len = 0;
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s->tx_fifo_len = 0;
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@ -242,40 +242,40 @@ static const VMStateDescription vmstate_pl022 = {
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.minimum_version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(cr0, pl022_state),
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VMSTATE_UINT32(cr0, PL022State),
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VMSTATE_UINT32(cr1, pl022_state),
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VMSTATE_UINT32(cr1, PL022State),
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VMSTATE_UINT32(bitmask, pl022_state),
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VMSTATE_UINT32(bitmask, PL022State),
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VMSTATE_UINT32(sr, pl022_state),
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VMSTATE_UINT32(sr, PL022State),
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VMSTATE_UINT32(cpsr, pl022_state),
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VMSTATE_UINT32(cpsr, PL022State),
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VMSTATE_UINT32(is, pl022_state),
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VMSTATE_UINT32(is, PL022State),
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VMSTATE_UINT32(im, pl022_state),
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VMSTATE_UINT32(im, PL022State),
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VMSTATE_INT32(tx_fifo_head, pl022_state),
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VMSTATE_INT32(tx_fifo_head, PL022State),
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VMSTATE_INT32(rx_fifo_head, pl022_state),
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VMSTATE_INT32(rx_fifo_head, PL022State),
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VMSTATE_INT32(tx_fifo_len, pl022_state),
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VMSTATE_INT32(tx_fifo_len, PL022State),
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VMSTATE_INT32(rx_fifo_len, pl022_state),
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VMSTATE_INT32(rx_fifo_len, PL022State),
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VMSTATE_UINT16(tx_fifo[0], pl022_state),
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VMSTATE_UINT16(tx_fifo[0], PL022State),
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VMSTATE_UINT16(rx_fifo[0], pl022_state),
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VMSTATE_UINT16(rx_fifo[0], PL022State),
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VMSTATE_UINT16(tx_fifo[1], pl022_state),
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VMSTATE_UINT16(tx_fifo[1], PL022State),
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VMSTATE_UINT16(rx_fifo[1], pl022_state),
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VMSTATE_UINT16(rx_fifo[1], PL022State),
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VMSTATE_UINT16(tx_fifo[2], pl022_state),
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VMSTATE_UINT16(tx_fifo[2], PL022State),
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VMSTATE_UINT16(rx_fifo[2], pl022_state),
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VMSTATE_UINT16(rx_fifo[2], PL022State),
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VMSTATE_UINT16(tx_fifo[3], pl022_state),
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VMSTATE_UINT16(tx_fifo[3], PL022State),
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VMSTATE_UINT16(rx_fifo[3], pl022_state),
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VMSTATE_UINT16(rx_fifo[3], PL022State),
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VMSTATE_UINT16(tx_fifo[4], pl022_state),
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VMSTATE_UINT16(tx_fifo[4], PL022State),
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VMSTATE_UINT16(rx_fifo[4], pl022_state),
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VMSTATE_UINT16(rx_fifo[4], PL022State),
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VMSTATE_UINT16(tx_fifo[5], pl022_state),
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VMSTATE_UINT16(tx_fifo[5], PL022State),
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VMSTATE_UINT16(rx_fifo[5], pl022_state),
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VMSTATE_UINT16(rx_fifo[5], PL022State),
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VMSTATE_UINT16(tx_fifo[6], pl022_state),
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VMSTATE_UINT16(tx_fifo[6], PL022State),
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VMSTATE_UINT16(rx_fifo[6], pl022_state),
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VMSTATE_UINT16(rx_fifo[6], PL022State),
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VMSTATE_UINT16(tx_fifo[7], pl022_state),
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VMSTATE_UINT16(tx_fifo[7], PL022State),
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VMSTATE_UINT16(rx_fifo[7], pl022_state),
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VMSTATE_UINT16(rx_fifo[7], PL022State),
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VMSTATE_END_OF_LIST()
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VMSTATE_END_OF_LIST()
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}
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}
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};
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};
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static int pl022_init(SysBusDevice *dev)
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static int pl022_init(SysBusDevice *dev)
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{
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{
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pl022_state *s = FROM_SYSBUS(pl022_state, dev);
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PL022State *s = FROM_SYSBUS(PL022State, dev);
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memory_region_init_io(&s->iomem, OBJECT(s), &pl022_ops, s, "pl022", 0x1000);
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memory_region_init_io(&s->iomem, OBJECT(s), &pl022_ops, s, "pl022", 0x1000);
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sysbus_init_mmio(dev, &s->iomem);
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sysbus_init_mmio(dev, &s->iomem);
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@ -296,7 +296,7 @@ static void pl022_class_init(ObjectClass *klass, void *data)
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static const TypeInfo pl022_info = {
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static const TypeInfo pl022_info = {
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.name = "pl022",
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.name = "pl022",
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(pl022_state),
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.instance_size = sizeof(PL022State),
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.class_init = pl022_class_init,
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.class_init = pl022_class_init,
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};
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};
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