target/i386: fix host_cpu_adjust_phys_bits error handling
move the check for phys_bits outside of host_cpu_adjust_phys_bits, because otherwise it is impossible to return an error condition explicitly. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-8-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -50,7 +50,7 @@ static void host_cpu_enable_cpu_pm(X86CPU *cpu)
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env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
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}
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static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp)
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static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
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{
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uint32_t host_phys_bits = host_cpu_phys_bits();
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uint32_t phys_bits = cpu->phys_bits;
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@ -77,14 +77,6 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp)
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}
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}
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if (phys_bits &&
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(phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
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phys_bits < 32)) {
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error_setg(errp, "phys-bits should be between 32 and %u "
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" (but is %u)",
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TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
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}
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return phys_bits;
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}
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@ -97,7 +89,17 @@ void host_cpu_realizefn(CPUState *cs, Error **errp)
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host_cpu_enable_cpu_pm(cpu);
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}
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if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
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cpu->phys_bits = host_cpu_adjust_phys_bits(cpu, errp);
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uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);
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if (phys_bits &&
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(phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
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phys_bits < 32)) {
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error_setg(errp, "phys-bits should be between 32 and %u "
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" (but is %u)",
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TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
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return;
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}
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cpu->phys_bits = phys_bits;
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}
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}
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