hw/isa/superio: Factor out the serial code from pc87312.c
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-12-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -14,6 +14,7 @@
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#include "sysemu/sysemu.h"
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#include "chardev/char.h"
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#include "hw/isa/superio.h"
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#include "hw/char/serial.h"
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#include "trace.h"
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static void isa_superio_realize(DeviceState *dev, Error **errp)
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@ -66,6 +67,46 @@ static void isa_superio_realize(DeviceState *dev, Error **errp)
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g_free(name);
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}
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}
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/* Serial */
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for (i = 0; i < k->serial.count; i++) {
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if (i >= ARRAY_SIZE(sio->serial)) {
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warn_report("superio: ignoring %td serial controllers",
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k->serial.count - ARRAY_SIZE(sio->serial));
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break;
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}
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if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
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/* FIXME use a qdev chardev prop instead of serial_hds[] */
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chr = serial_hds[i];
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if (chr == NULL || chr->be) {
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name = g_strdup_printf("discarding-serial%d", i);
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chr = qemu_chr_new(name, "null");
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} else {
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name = g_strdup_printf("serial%d", i);
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}
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isa = isa_create(bus, TYPE_ISA_SERIAL);
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d = DEVICE(isa);
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qdev_prop_set_uint32(d, "index", i);
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if (k->serial.get_iobase) {
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qdev_prop_set_uint32(d, "iobase",
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k->serial.get_iobase(sio, i));
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}
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if (k->serial.get_irq) {
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qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
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}
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qdev_prop_set_chr(d, "chardev", chr);
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qdev_init_nofail(d);
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sio->serial[i] = isa;
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trace_superio_create_serial(i,
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k->serial.get_iobase ?
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k->serial.get_iobase(sio, i) : -1,
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k->serial.get_irq ?
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k->serial.get_irq(sio, i) : -1);
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object_property_add_child(OBJECT(dev), name,
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OBJECT(sio->serial[0]), NULL);
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g_free(name);
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}
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}
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}
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static void isa_superio_class_init(ObjectClass *oc, void *data)
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@ -29,8 +29,6 @@
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#include "qemu/error-report.h"
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#include "sysemu/block-backend.h"
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#include "sysemu/blockdev.h"
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#include "sysemu/sysemu.h"
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#include "chardev/char.h"
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#include "trace.h"
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@ -100,8 +98,9 @@ static const uint16_t uart_base[2][4] = {
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{ 0x2e8, 0x238, 0x2e0, 0x228 }
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};
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static inline uint16_t get_uart_iobase(PC87312State *s, int i)
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static uint16_t get_uart_iobase(ISASuperIODevice *sio, uint8_t i)
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{
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PC87312State *s = PC87312(sio);
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int idx;
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idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
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if (idx == 0) {
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@ -113,15 +112,17 @@ static inline uint16_t get_uart_iobase(PC87312State *s, int i)
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}
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}
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static inline unsigned int get_uart_irq(PC87312State *s, int i)
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static unsigned int get_uart_irq(ISASuperIODevice *sio, uint8_t i)
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{
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PC87312State *s = PC87312(sio);
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int idx;
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idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
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return (idx & 1) ? 3 : 4;
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}
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static inline bool is_uart_enabled(PC87312State *s, int i)
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static bool is_uart_enabled(ISASuperIODevice *sio, uint8_t i)
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{
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PC87312State *s = PC87312(sio);
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return s->regs[REG_FER] & (FER_UART1_EN << i);
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}
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@ -271,11 +272,8 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
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DeviceState *d;
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ISADevice *isa;
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ISABus *bus;
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Chardev *chr;
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DriveInfo *drive;
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Error *local_err = NULL;
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char name[5];
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int i;
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s = PC87312(dev);
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isa = ISA_DEVICE(dev);
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@ -289,27 +287,6 @@ static void pc87312_realize(DeviceState *dev, Error **errp)
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return;
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}
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for (i = 0; i < 2; i++) {
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if (is_uart_enabled(s, i)) {
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/* FIXME use a qdev chardev prop instead of serial_hds[] */
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chr = serial_hds[i];
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if (chr == NULL) {
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snprintf(name, sizeof(name), "ser%d", i);
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chr = qemu_chr_new(name, "null");
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}
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isa = isa_create(bus, "isa-serial");
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d = DEVICE(isa);
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qdev_prop_set_uint32(d, "index", i);
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qdev_prop_set_uint32(d, "iobase", get_uart_iobase(s, i));
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qdev_prop_set_uint32(d, "irq", get_uart_irq(s, i));
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qdev_prop_set_chr(d, "chardev", chr);
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qdev_init_nofail(d);
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s->uart[i].dev = isa;
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trace_pc87312_info_serial(i, get_uart_iobase(s, i),
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get_uart_irq(s, i));
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}
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}
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if (is_fdc_enabled(s)) {
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isa = isa_create(bus, "isa-fdc");
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d = DEVICE(isa);
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@ -380,8 +357,6 @@ static void pc87312_class_init(ObjectClass *klass, void *data)
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dc->reset = pc87312_reset;
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dc->vmsd = &vmstate_pc87312;
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dc->props = pc87312_properties;
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/* Reason: Uses serial_hds[0] in realize(), so it can't be used twice */
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dc->user_creatable = false;
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sc->parallel = (ISASuperIOFuncs){
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.count = 1,
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@ -389,6 +364,12 @@ static void pc87312_class_init(ObjectClass *klass, void *data)
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.get_iobase = get_parallel_iobase,
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.get_irq = get_parallel_irq,
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};
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sc->serial = (ISASuperIOFuncs){
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.count = 2,
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.is_enabled = is_uart_enabled,
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.get_iobase = get_uart_iobase,
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.get_irq = get_uart_irq,
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};
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}
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static const TypeInfo pc87312_type_info = {
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@ -2,10 +2,10 @@
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# hw/isa/isa-superio.c
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superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
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superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
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# hw/isa/pc87312.c
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pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
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pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
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pc87312_info_floppy(uint32_t base) "base 0x%x"
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pc87312_info_ide(uint32_t base) "base 0x%x"
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pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
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@ -39,10 +39,6 @@ typedef struct PC87312State {
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uint16_t iobase;
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uint8_t config; /* initial configuration */
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struct {
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ISADevice *dev;
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} uart[2];
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struct {
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ISADevice *dev;
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} fdc;
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@ -28,6 +28,7 @@ typedef struct ISASuperIODevice {
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/*< public >*/
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ISADevice *parallel[MAX_PARALLEL_PORTS];
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ISADevice *serial[MAX_SERIAL_PORTS];
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} ISASuperIODevice;
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typedef struct ISASuperIOFuncs {
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@ -45,6 +46,7 @@ typedef struct ISASuperIOClass {
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DeviceRealize parent_realize;
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ISASuperIOFuncs parallel;
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ISASuperIOFuncs serial;
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} ISASuperIOClass;
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#endif /* HW_ISA_SUPERIO_H */
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