mirror of https://gitlab.com/qemu-project/qemu
target/i386: pass cr3 to mmu_translate
First step in unifying the nested and regular page table walk. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
661ff4879e
commit
cd906d315d
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@ -246,7 +246,7 @@ static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
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#define PG_ERROR_OK (-1)
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#define PG_ERROR_OK (-1)
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static int mmu_translate(CPUState *cs, vaddr addr,
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static int mmu_translate(CPUState *cs, vaddr addr,
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int is_write1, int mmu_idx,
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uint64_t cr3, int is_write1, int mmu_idx,
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vaddr *xlat, int *page_size, int *prot)
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vaddr *xlat, int *page_size, int *prot)
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{
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{
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X86CPU *cpu = X86_CPU(cs);
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X86CPU *cpu = X86_CPU(cs);
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@ -288,7 +288,7 @@ static int mmu_translate(CPUState *cs, vaddr addr,
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}
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}
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if (la57) {
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if (la57) {
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pml5e_addr = ((env->cr[3] & ~0xfff) +
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pml5e_addr = ((cr3 & ~0xfff) +
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(((addr >> 48) & 0x1ff) << 3)) & a20_mask;
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(((addr >> 48) & 0x1ff) << 3)) & a20_mask;
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pml5e_addr = get_hphys(cs, pml5e_addr, MMU_DATA_STORE, NULL);
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pml5e_addr = get_hphys(cs, pml5e_addr, MMU_DATA_STORE, NULL);
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pml5e = x86_ldq_phys(cs, pml5e_addr);
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pml5e = x86_ldq_phys(cs, pml5e_addr);
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@ -304,7 +304,7 @@ static int mmu_translate(CPUState *cs, vaddr addr,
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}
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}
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ptep = pml5e ^ PG_NX_MASK;
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ptep = pml5e ^ PG_NX_MASK;
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} else {
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} else {
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pml5e = env->cr[3];
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pml5e = cr3;
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ptep = PG_NX_MASK | PG_USER_MASK | PG_RW_MASK;
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ptep = PG_NX_MASK | PG_USER_MASK | PG_RW_MASK;
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}
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}
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@ -349,7 +349,7 @@ static int mmu_translate(CPUState *cs, vaddr addr,
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#endif
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#endif
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{
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{
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/* XXX: load them when cr3 is loaded ? */
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/* XXX: load them when cr3 is loaded ? */
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pdpe_addr = ((env->cr[3] & ~0x1f) + ((addr >> 27) & 0x18)) &
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pdpe_addr = ((cr3 & ~0x1f) + ((addr >> 27) & 0x18)) &
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a20_mask;
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a20_mask;
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pdpe_addr = get_hphys(cs, pdpe_addr, MMU_DATA_STORE, false);
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pdpe_addr = get_hphys(cs, pdpe_addr, MMU_DATA_STORE, false);
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pdpe = x86_ldq_phys(cs, pdpe_addr);
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pdpe = x86_ldq_phys(cs, pdpe_addr);
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@ -403,7 +403,7 @@ static int mmu_translate(CPUState *cs, vaddr addr,
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uint32_t pde;
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uint32_t pde;
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/* page directory entry */
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/* page directory entry */
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pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) &
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pde_addr = ((cr3 & ~0xfff) + ((addr >> 20) & 0xffc)) &
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a20_mask;
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a20_mask;
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pde_addr = get_hphys(cs, pde_addr, MMU_DATA_STORE, NULL);
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pde_addr = get_hphys(cs, pde_addr, MMU_DATA_STORE, NULL);
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pde = x86_ldl_phys(cs, pde_addr);
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pde = x86_ldl_phys(cs, pde_addr);
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@ -573,7 +573,7 @@ static int handle_mmu_fault(CPUState *cs, vaddr addr, int size,
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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page_size = 4096;
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page_size = 4096;
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} else {
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} else {
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error_code = mmu_translate(cs, addr, is_write1,
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error_code = mmu_translate(cs, addr, env->cr[3], is_write1,
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mmu_idx,
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mmu_idx,
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&paddr, &page_size, &prot);
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&paddr, &page_size, &prot);
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}
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}
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