hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240505141613.387508-1-ines.varhol@telecom-paris.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Inès Varhol 2024-05-23 16:06:20 +01:00 committed by Peter Maydell
parent 03935f9272
commit cd2a2788a9
1 changed files with 1 additions and 1 deletions

View File

@ -56,7 +56,7 @@ REG32(CR1, 0x00)
FIELD(CR1, UE, 0, 1) /* USART enable */
REG32(CR2, 0x04)
FIELD(CR2, ADD_1, 28, 4) /* ADD[7:4] */
FIELD(CR2, ADD_0, 24, 1) /* ADD[3:0] */
FIELD(CR2, ADD_0, 24, 4) /* ADD[3:0] */
FIELD(CR2, RTOEN, 23, 1) /* Receiver timeout enable */
FIELD(CR2, ABRMOD, 21, 2) /* Auto baud rate mode */
FIELD(CR2, ABREN, 20, 1) /* Auto baud rate enable */