target/i386: clarify the "reg" argument of functions returning CCPrepare
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -937,7 +937,7 @@ static CCPrepare gen_prepare_sign_nz(TCGv src, MemOp size)
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}
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}
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}
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}
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/* compute eflags.C to reg */
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/* compute eflags.C, trying to store it in reg if not NULL */
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static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
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static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
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{
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{
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MemOp size;
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MemOp size;
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@ -1008,7 +1008,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg)
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}
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}
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}
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}
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/* compute eflags.P to reg */
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/* compute eflags.P, trying to store it in reg if not NULL */
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static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg)
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static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg)
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{
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{
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gen_compute_eflags(s);
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gen_compute_eflags(s);
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@ -1016,7 +1016,7 @@ static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg)
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.imm = CC_P };
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.imm = CC_P };
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}
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}
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/* compute eflags.S to reg */
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/* compute eflags.S, trying to store it in reg if not NULL */
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static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg)
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static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg)
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{
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{
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switch (s->cc_op) {
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switch (s->cc_op) {
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@ -1040,7 +1040,7 @@ static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg)
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}
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}
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}
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}
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/* compute eflags.O to reg */
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/* compute eflags.O, trying to store it in reg if not NULL */
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static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg)
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static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg)
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{
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{
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switch (s->cc_op) {
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switch (s->cc_op) {
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@ -1060,7 +1060,7 @@ static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg)
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}
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}
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}
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}
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/* compute eflags.Z to reg */
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/* compute eflags.Z, trying to store it in reg if not NULL */
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static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
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static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
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{
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{
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switch (s->cc_op) {
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switch (s->cc_op) {
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@ -1090,8 +1090,9 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg)
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}
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}
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}
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}
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/* perform a conditional store into register 'reg' according to jump opcode
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/* return how to compute jump opcode 'b'. 'reg' can be clobbered
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value 'b'. In the fast case, T0 is guaranteed not to be used. */
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* if needed; it may be used for CCPrepare.reg if that will
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* provide more freedom in the translation of a subsequent setcond. */
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static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
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{
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{
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int inv, jcc_op, cond;
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int inv, jcc_op, cond;
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