usb/hcd-ehci: Replace PORTSC macros with variables
Replace PORTSC macros with variables which could then be configured in ehci_xxxx_class_init(...) Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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@ -78,6 +78,8 @@ static void usb_ehci_pci_init(Object *obj)
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s->capsbase = 0x00;
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s->capsbase = 0x00;
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s->opregbase = 0x20;
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s->opregbase = 0x20;
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s->portscbase = 0x44;
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s->portnr = NB_PORTS;
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usb_ehci_init(s, DEVICE(obj));
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usb_ehci_init(s, DEVICE(obj));
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}
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}
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@ -51,6 +51,8 @@ static void ehci_sysbus_init(Object *obj)
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s->capsbase = sec->capsbase;
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s->capsbase = sec->capsbase;
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s->opregbase = sec->opregbase;
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s->opregbase = sec->opregbase;
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s->portscbase = sec->portscbase;
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s->portnr = sec->portnr;
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s->as = &address_space_memory;
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s->as = &address_space_memory;
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usb_ehci_init(s, DEVICE(obj));
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usb_ehci_init(s, DEVICE(obj));
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@ -60,6 +62,10 @@ static void ehci_sysbus_init(Object *obj)
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static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
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static void ehci_sysbus_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(klass);
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sec->portscbase = 0x44;
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sec->portnr = NB_PORTS;
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dc->realize = usb_ehci_sysbus_realize;
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dc->realize = usb_ehci_sysbus_realize;
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dc->vmsd = &vmstate_ehci_sysbus;
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dc->vmsd = &vmstate_ehci_sysbus;
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@ -995,7 +995,7 @@ static uint64_t ehci_port_read(void *ptr, hwaddr addr,
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uint32_t val;
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uint32_t val;
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val = s->portsc[addr >> 2];
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val = s->portsc[addr >> 2];
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trace_usb_ehci_portsc_read(addr + PORTSC_BEGIN, addr >> 2, val);
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trace_usb_ehci_portsc_read(addr + s->portscbase, addr >> 2, val);
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return val;
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return val;
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}
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}
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@ -1036,7 +1036,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
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uint32_t old = *portsc;
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uint32_t old = *portsc;
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USBDevice *dev = s->ports[port].dev;
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USBDevice *dev = s->ports[port].dev;
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trace_usb_ehci_portsc_write(addr + PORTSC_BEGIN, addr >> 2, val);
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trace_usb_ehci_portsc_write(addr + s->portscbase, addr >> 2, val);
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/* Clear rwc bits */
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/* Clear rwc bits */
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*portsc &= ~(val & PORTSC_RWC_MASK);
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*portsc &= ~(val & PORTSC_RWC_MASK);
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@ -1069,7 +1069,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
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*portsc &= ~PORTSC_RO_MASK;
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*portsc &= ~PORTSC_RO_MASK;
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*portsc |= val;
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*portsc |= val;
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trace_usb_ehci_portsc_change(addr + PORTSC_BEGIN, addr >> 2, *portsc, old);
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trace_usb_ehci_portsc_change(addr + s->portscbase, addr >> 2, *portsc, old);
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}
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}
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static void ehci_opreg_write(void *ptr, hwaddr addr,
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static void ehci_opreg_write(void *ptr, hwaddr addr,
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@ -2512,8 +2512,14 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
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{
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{
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int i;
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int i;
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if (s->portnr > NB_PORTS) {
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error_setg(errp, "Too many ports! Max. port number is %d.",
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NB_PORTS);
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return;
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}
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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for (i = 0; i < NB_PORTS; i++) {
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for (i = 0; i < s->portnr; i++) {
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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USB_SPEED_MASK_HIGH);
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USB_SPEED_MASK_HIGH);
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s->ports[i].dev = 0;
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s->ports[i].dev = 0;
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@ -2533,7 +2539,7 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
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s->caps[0x01] = 0x00;
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s->caps[0x01] = 0x00;
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s->caps[0x02] = 0x00;
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s->caps[0x02] = 0x00;
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s->caps[0x03] = 0x01; /* HC version */
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s->caps[0x03] = 0x01; /* HC version */
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s->caps[0x04] = NB_PORTS; /* Number of downstream ports */
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s->caps[0x04] = s->portnr; /* Number of downstream ports */
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s->caps[0x05] = 0x00; /* No companion ports at present */
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s->caps[0x05] = 0x00; /* No companion ports at present */
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s->caps[0x06] = 0x00;
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s->caps[0x06] = 0x00;
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s->caps[0x07] = 0x00;
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s->caps[0x07] = 0x00;
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@ -2549,13 +2555,13 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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"capabilities", CAPA_SIZE);
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"capabilities", CAPA_SIZE);
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memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
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memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
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"operational", PORTSC_BEGIN);
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"operational", s->portscbase);
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memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
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memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
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"ports", PORTSC_END - PORTSC_BEGIN);
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"ports", 4 * s->portnr);
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memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
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memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
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memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
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memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
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memory_region_add_subregion(&s->mem, s->opregbase + PORTSC_BEGIN,
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memory_region_add_subregion(&s->mem, s->opregbase + s->portscbase,
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&s->mem_ports);
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&s->mem_ports);
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}
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}
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@ -40,11 +40,7 @@
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#define MMIO_SIZE 0x1000
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#define MMIO_SIZE 0x1000
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#define CAPA_SIZE 0x10
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#define CAPA_SIZE 0x10
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#define PORTSC 0x0044
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#define NB_PORTS 6 /* Max. Number of downstream ports */
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#define PORTSC_BEGIN PORTSC
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#define PORTSC_END (PORTSC + 4 * NB_PORTS)
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#define NB_PORTS 6 /* Number of downstream ports */
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typedef struct EHCIPacket EHCIPacket;
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typedef struct EHCIPacket EHCIPacket;
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typedef struct EHCIQueue EHCIQueue;
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typedef struct EHCIQueue EHCIQueue;
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@ -268,6 +264,8 @@ struct EHCIState {
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int companion_count;
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int companion_count;
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uint16_t capsbase;
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uint16_t capsbase;
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uint16_t opregbase;
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uint16_t opregbase;
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uint16_t portscbase;
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uint16_t portnr;
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/* properties */
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/* properties */
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uint32_t maxframes;
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uint32_t maxframes;
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@ -278,7 +276,7 @@ struct EHCIState {
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*/
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*/
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uint8_t caps[CAPA_SIZE];
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uint8_t caps[CAPA_SIZE];
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union {
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union {
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uint32_t opreg[PORTSC_BEGIN/sizeof(uint32_t)];
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uint32_t opreg[0x44/sizeof(uint32_t)];
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struct {
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struct {
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uint32_t usbcmd;
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uint32_t usbcmd;
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uint32_t usbsts;
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uint32_t usbsts;
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@ -363,6 +361,8 @@ typedef struct SysBusEHCIClass {
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uint16_t capsbase;
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uint16_t capsbase;
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uint16_t opregbase;
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uint16_t opregbase;
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uint16_t portscbase;
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uint16_t portnr;
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} SysBusEHCIClass;
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} SysBusEHCIClass;
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#endif
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#endif
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