kvm: require KVM_CAP_SIGNAL_MSI
This was introduced in KVM in Linux 3.5, we can require it unconditionally in kvm_irqchip_send_msi(). However, not all architectures have to implement it so check it only in x86, the only architecture that ever had MSI injection but not KVM_CAP_SIGNAL_MSI. ARM uses it to detect the presence of the ITS emulation in the kernel, introduced in Linux 4.8. Assume that it's there and possibly fail when realizing the arm-its-kvm device. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -99,7 +99,6 @@ bool kvm_gsi_direct_mapping;
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bool kvm_allowed;
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bool kvm_readonly_mem_allowed;
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bool kvm_vm_attributes_allowed;
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bool kvm_direct_msi_allowed;
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bool kvm_ioeventfd_any_length_allowed;
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bool kvm_msi_use_devid;
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bool kvm_has_guest_debug;
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@ -1848,7 +1847,7 @@ static void clear_gsi(KVMState *s, unsigned int gsi)
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void kvm_init_irq_routing(KVMState *s)
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{
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int gsi_count, i;
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int gsi_count;
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gsi_count = kvm_check_extension(s, KVM_CAP_IRQ_ROUTING) - 1;
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if (gsi_count > 0) {
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@ -1860,12 +1859,6 @@ void kvm_init_irq_routing(KVMState *s)
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s->irq_routes = g_malloc0(sizeof(*s->irq_routes));
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s->nr_allocated_irq_routes = 0;
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if (!kvm_direct_msi_allowed) {
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for (i = 0; i < KVM_MSI_HASHTAB_SIZE; i++) {
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QTAILQ_INIT(&s->msi_hashtab[i]);
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}
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}
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kvm_arch_init_irq_routing(s);
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}
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@ -1985,41 +1978,10 @@ void kvm_irqchip_change_notify(void)
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notifier_list_notify(&kvm_irqchip_change_notifiers, NULL);
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}
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static unsigned int kvm_hash_msi(uint32_t data)
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{
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/* This is optimized for IA32 MSI layout. However, no other arch shall
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* repeat the mistake of not providing a direct MSI injection API. */
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return data & 0xff;
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}
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static void kvm_flush_dynamic_msi_routes(KVMState *s)
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{
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KVMMSIRoute *route, *next;
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unsigned int hash;
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for (hash = 0; hash < KVM_MSI_HASHTAB_SIZE; hash++) {
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QTAILQ_FOREACH_SAFE(route, &s->msi_hashtab[hash], entry, next) {
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kvm_irqchip_release_virq(s, route->kroute.gsi);
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QTAILQ_REMOVE(&s->msi_hashtab[hash], route, entry);
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g_free(route);
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}
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}
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}
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static int kvm_irqchip_get_virq(KVMState *s)
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{
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int next_virq;
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/*
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* PIC and IOAPIC share the first 16 GSI numbers, thus the available
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* GSI numbers are more than the number of IRQ route. Allocating a GSI
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* number can succeed even though a new route entry cannot be added.
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* When this happens, flush dynamic MSI entries to free IRQ route entries.
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*/
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if (!kvm_direct_msi_allowed && s->irq_routes->nr == s->gsi_count) {
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kvm_flush_dynamic_msi_routes(s);
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}
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/* Return the lowest unused GSI in the bitmap */
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next_virq = find_first_zero_bit(s->used_gsi_bitmap, s->gsi_count);
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if (next_virq >= s->gsi_count) {
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@ -2029,63 +1991,17 @@ static int kvm_irqchip_get_virq(KVMState *s)
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}
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}
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static KVMMSIRoute *kvm_lookup_msi_route(KVMState *s, MSIMessage msg)
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{
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unsigned int hash = kvm_hash_msi(msg.data);
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KVMMSIRoute *route;
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QTAILQ_FOREACH(route, &s->msi_hashtab[hash], entry) {
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if (route->kroute.u.msi.address_lo == (uint32_t)msg.address &&
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route->kroute.u.msi.address_hi == (msg.address >> 32) &&
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route->kroute.u.msi.data == le32_to_cpu(msg.data)) {
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return route;
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}
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}
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return NULL;
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}
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int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg)
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{
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struct kvm_msi msi;
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KVMMSIRoute *route;
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if (kvm_direct_msi_allowed) {
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msi.address_lo = (uint32_t)msg.address;
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msi.address_hi = msg.address >> 32;
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msi.data = le32_to_cpu(msg.data);
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msi.flags = 0;
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memset(msi.pad, 0, sizeof(msi.pad));
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msi.address_lo = (uint32_t)msg.address;
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msi.address_hi = msg.address >> 32;
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msi.data = le32_to_cpu(msg.data);
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msi.flags = 0;
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memset(msi.pad, 0, sizeof(msi.pad));
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return kvm_vm_ioctl(s, KVM_SIGNAL_MSI, &msi);
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}
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route = kvm_lookup_msi_route(s, msg);
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if (!route) {
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int virq;
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virq = kvm_irqchip_get_virq(s);
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if (virq < 0) {
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return virq;
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}
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route = g_new0(KVMMSIRoute, 1);
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route->kroute.gsi = virq;
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route->kroute.type = KVM_IRQ_ROUTING_MSI;
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route->kroute.flags = 0;
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route->kroute.u.msi.address_lo = (uint32_t)msg.address;
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route->kroute.u.msi.address_hi = msg.address >> 32;
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route->kroute.u.msi.data = le32_to_cpu(msg.data);
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kvm_add_routing_entry(s, &route->kroute);
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kvm_irqchip_commit_routes(s);
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QTAILQ_INSERT_TAIL(&s->msi_hashtab[kvm_hash_msi(msg.data)], route,
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entry);
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}
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assert(route->kroute.type == KVM_IRQ_ROUTING_MSI);
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return kvm_set_irq(s, route->kroute.gsi, 1);
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return kvm_vm_ioctl(s, KVM_SIGNAL_MSI, &msi);
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}
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int kvm_irqchip_add_msi_route(KVMRouteChange *c, int vector, PCIDevice *dev)
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@ -2660,10 +2576,6 @@ static int kvm_init(MachineState *ms)
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s->max_nested_state_len = kvm_check_extension(s, KVM_CAP_NESTED_STATE);
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#ifdef KVM_CAP_IRQ_ROUTING
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kvm_direct_msi_allowed = (kvm_check_extension(s, KVM_CAP_SIGNAL_MSI) > 0);
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#endif
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s->intx_set_mask = kvm_check_extension(s, KVM_CAP_PCI_2_3);
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s->irq_set_ioctl = KVM_IRQ_LINE;
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@ -27,7 +27,6 @@ bool kvm_allowed;
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bool kvm_readonly_mem_allowed;
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bool kvm_ioeventfd_any_length_allowed;
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bool kvm_msi_use_devid;
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bool kvm_direct_msi_allowed;
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void kvm_flush_coalesced_mmio_buffer(void)
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{
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@ -163,8 +163,7 @@ type_init(gicv3_its_common_register_types)
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const char *its_class_name(void)
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{
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if (kvm_irqchip_in_kernel()) {
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/* KVM implementation requires this capability */
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return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL;
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return "arm-its-kvm";
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} else {
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/* Software emulation based model */
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return "arm-gicv3-its";
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@ -43,7 +43,6 @@ extern bool kvm_msi_via_irqfd_allowed;
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extern bool kvm_gsi_routing_allowed;
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extern bool kvm_gsi_direct_mapping;
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extern bool kvm_readonly_mem_allowed;
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extern bool kvm_direct_msi_allowed;
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extern bool kvm_ioeventfd_any_length_allowed;
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extern bool kvm_msi_use_devid;
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@ -147,13 +146,6 @@ extern bool kvm_msi_use_devid;
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*/
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#define kvm_readonly_mem_enabled() (kvm_readonly_mem_allowed)
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/**
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* kvm_direct_msi_enabled:
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*
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* Returns: true if KVM allows direct MSI injection.
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*/
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#define kvm_direct_msi_enabled() (kvm_direct_msi_allowed)
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/**
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* kvm_ioeventfd_any_length_enabled:
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* Returns: true if KVM allows any length io eventfd.
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@ -181,7 +173,6 @@ extern bool kvm_msi_use_devid;
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#define kvm_gsi_routing_allowed() (false)
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#define kvm_gsi_direct_mapping() (false)
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#define kvm_readonly_mem_enabled() (false)
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#define kvm_direct_msi_enabled() (false)
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#define kvm_ioeventfd_any_length_enabled() (false)
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#define kvm_msi_devid_required() (false)
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@ -103,7 +103,6 @@ struct KVMState
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int nr_allocated_irq_routes;
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unsigned long *used_gsi_bitmap;
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unsigned int gsi_count;
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QTAILQ_HEAD(, KVMMSIRoute) msi_hashtab[KVM_MSI_HASHTAB_SIZE];
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#endif
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KVMMemoryListener memory_listener;
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QLIST_HEAD(, KVMParkedVcpu) kvm_parked_vcpus;
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@ -91,6 +91,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
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KVM_CAP_INFO(SET_TSS_ADDR),
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KVM_CAP_INFO(EXT_CPUID),
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KVM_CAP_INFO(MP_STATE),
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KVM_CAP_INFO(SIGNAL_MSI),
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KVM_CAP_LAST_INFO
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};
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