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target/riscv/cpu.c: limit cfg->vext_spec log message

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Inside riscv_cpu_validate_v() we're always throwing a log message if the
user didn't set a vector version via 'vext_spec'.

We're going to include one case with the 'max' CPU where env->vext_ver
will be set in the cpu_init(). But that alone will not stop the "vector
version is not specified" message from appearing. The usefulness of this
log message is debatable for the generic CPUs, but for a 'max' CPU type,
where we are supposed to deliver a CPU model with all features possible,
it's strange to force users to set 'vext_spec' to get rid of this
message.

Change riscv_cpu_validate_v() to not throw this log message if
env->vext_ver is already set.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-ID: <20230912132423.268494-10-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-09-12 10:24:12 -03:00 committed by Alistair Francis
parent b55c39b3f5
commit cbaac1d22b
1 changed files with 4 additions and 5 deletions
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9
target/riscv/cpu.c
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@ -959,8 +959,6 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
Error **errp) Error **errp)
{ {
int vext_version = VEXT_VERSION_1_00_0;
if (!is_power_of_2(cfg->vlen)) { if (!is_power_of_2(cfg->vlen)) {
error_setg(errp, "Vector extension VLEN must be power of 2"); error_setg(errp, "Vector extension VLEN must be power of 2");
return; return;
@ -983,17 +981,18 @@ static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
} }
if (cfg->vext_spec) { if (cfg->vext_spec) {
if (!g_strcmp0(cfg->vext_spec, "v1.0")) { if (!g_strcmp0(cfg->vext_spec, "v1.0")) {
vext_version = VEXT_VERSION_1_00_0; env->vext_ver = VEXT_VERSION_1_00_0;
} else { } else {
error_setg(errp, "Unsupported vector spec version '%s'", error_setg(errp, "Unsupported vector spec version '%s'",
cfg->vext_spec); cfg->vext_spec);
return; return;
} }
} else { } else if (env->vext_ver == 0) {
qemu_log("vector version is not specified, " qemu_log("vector version is not specified, "
"use the default value v1.0\n"); "use the default value v1.0\n");
env->vext_ver = VEXT_VERSION_1_00_0;
} }
env->vext_ver = vext_version;
} }
static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp) static void riscv_cpu_validate_priv_spec(RISCVCPU *cpu, Error **errp)