esp.c: zero command register when TI command terminates due to phase change
This is the behaviour documented in the datasheet and allows the state machine to correctly process multiple consecutive TI commands. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-63-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -519,6 +519,7 @@ static void esp_do_dma(ESPState *s)
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/* ATN remains asserted until TC == 0 */
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if (esp_get_tc(s) == 0) {
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esp_set_phase(s, STAT_CD);
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s->rregs[ESP_CMD] = 0;
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s->rregs[ESP_RSEQ] = SEQ_CD;
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s->rregs[ESP_RINTR] |= INTR_BS;
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esp_raise_irq(s);
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@ -717,6 +718,7 @@ static void esp_do_nodma(ESPState *s)
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*/
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s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo);
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esp_set_phase(s, STAT_CD);
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s->rregs[ESP_CMD] = 0;
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s->rregs[ESP_RSEQ] = SEQ_CD;
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s->rregs[ESP_RINTR] |= INTR_BS;
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esp_raise_irq(s);
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@ -831,6 +833,11 @@ void esp_command_complete(SCSIRequest *req, size_t resid)
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*/
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s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
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break;
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case CMD_TI | CMD_DMA:
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case CMD_TI:
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s->rregs[ESP_CMD] = 0;
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break;
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}
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/* Raise bus service interrupt to indicate change to STATUS phase */
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@ -885,6 +892,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
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* Bus service interrupt raised because of initial change to
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* DATA phase
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*/
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s->rregs[ESP_CMD] = 0;
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s->rregs[ESP_RINTR] |= INTR_BS;
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break;
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}
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