target-arm: Add Cortex-A57 processor
Add Cortex-A57 processor. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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@ -32,6 +32,48 @@ static inline void set_feature(CPUARMState *env, int feature)
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env->features |= 1ULL << feature;
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}
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static void aarch64_a57_initfn(Object *obj)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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set_feature(&cpu->env, ARM_FEATURE_V8);
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set_feature(&cpu->env, ARM_FEATURE_VFP4);
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set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
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set_feature(&cpu->env, ARM_FEATURE_AARCH64);
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cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57;
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cpu->midr = 0x411fd070;
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cpu->reset_fpsid = 0x41034070;
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cpu->mvfr0 = 0x10110222;
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cpu->mvfr1 = 0x12111111;
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cpu->mvfr2 = 0x00000043;
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cpu->ctr = 0x8444c004;
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cpu->reset_sctlr = 0x00c50838;
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cpu->id_pfr0 = 0x00000131;
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cpu->id_pfr1 = 0x00011011;
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cpu->id_dfr0 = 0x03010066;
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cpu->id_afr0 = 0x00000000;
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cpu->id_mmfr0 = 0x10101105;
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cpu->id_mmfr1 = 0x40000000;
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cpu->id_mmfr2 = 0x01260000;
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cpu->id_mmfr3 = 0x02102211;
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cpu->id_isar0 = 0x02101110;
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cpu->id_isar1 = 0x13112111;
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cpu->id_isar2 = 0x21232042;
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cpu->id_isar3 = 0x01112131;
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cpu->id_isar4 = 0x00011142;
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cpu->id_aa64pfr0 = 0x00002222;
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cpu->id_aa64dfr0 = 0x10305106;
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cpu->id_aa64isar0 = 0x00010000;
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cpu->id_aa64mmfr0 = 0x00001124;
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cpu->clidr = 0x0a200023;
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cpu->ccsidr[0] = 0x701fe00a; /* 32KB L1 dcache */
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cpu->ccsidr[1] = 0x201fe012; /* 48KB L1 icache */
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cpu->ccsidr[2] = 0x70ffe07a; /* 2048KB L2 cache */
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cpu->dcz_blocksize = 4; /* 64 bytes */
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}
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#ifdef CONFIG_USER_ONLY
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static void aarch64_any_initfn(Object *obj)
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{
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@ -57,6 +99,7 @@ typedef struct ARMCPUInfo {
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} ARMCPUInfo;
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static const ARMCPUInfo aarch64_cpus[] = {
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{ .name = "cortex-a57", .initfn = aarch64_a57_initfn },
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#ifdef CONFIG_USER_ONLY
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{ .name = "any", .initfn = aarch64_any_initfn },
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#endif
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