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hw/arm_gic: Fix comparison with priority mask register

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The GIC spec states that only interrupts with higher priority
than the value in the GICC_PMR priority mask register are
passed through to the processor. We were incorrectly allowing
through interrupts with a priority equal to the specified
value: correct the comparison operation to match the spec.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
This commit is contained in:
Peter Maydell 2012-12-11 11:30:37 +00:00
parent bf471f7950
commit cad065f18e
1 changed files with 1 additions and 1 deletions
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2
hw/arm_gic.c
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@ -73,7 +73,7 @@ void gic_update(GICState *s)
}
}
level = 0;
if (best_prio <= s->priority_mask[cpu]) {
if (best_prio < s->priority_mask[cpu]) {
s->current_pending[cpu] = best_irq;
if (best_prio < s->running_priority[cpu]) {
DPRINTF("Raised pending IRQ %d\n", best_irq);