target/arm: Introduce gen_gvec_ool_arg_zzzz
Use gen_gvec_ool_arg_zzzz instead of gen_gvec_ool_zzzz when the arguments come from arg_rrrr_esz. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-11-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -193,6 +193,12 @@ static bool gen_gvec_ool_zzzz(DisasContext *s, gen_helper_gvec_4 *fn,
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return true;
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}
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static bool gen_gvec_ool_arg_zzzz(DisasContext *s, gen_helper_gvec_4 *fn,
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arg_rrrr_esz *a, int data)
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{
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return gen_gvec_ool_zzzz(s, fn, a->rd, a->rn, a->rm, a->ra, data);
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}
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/* Invoke an out-of-line helper on 2 Zregs and a predicate. */
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static void gen_gvec_ool_zzp(DisasContext *s, gen_helper_gvec_3 *fn,
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int rd, int rn, int pg, int data)
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@ -7109,7 +7115,7 @@ static bool do_sve2_zzzz_ool(DisasContext *s, arg_rrrr_esz *a,
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if (!dc_isar_feature(aa64_sve2, s)) {
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return false;
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}
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return gen_gvec_ool_zzzz(s, fn, a->rd, a->rn, a->rm, a->ra, data);
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return gen_gvec_ool_arg_zzzz(s, fn, a, data);
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}
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static bool do_abal(DisasContext *s, arg_rrrr_esz *a, bool uns, bool sel)
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@ -8407,7 +8413,7 @@ static bool do_i8mm_zzzz_ool(DisasContext *s, arg_rrrr_esz *a,
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if (!dc_isar_feature(aa64_sve_i8mm, s)) {
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return false;
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}
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return gen_gvec_ool_zzzz(s, fn, a->rd, a->rn, a->rm, a->ra, data);
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return gen_gvec_ool_arg_zzzz(s, fn, a, data);
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}
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static bool trans_SMMLA(DisasContext *s, arg_rrrr_esz *a)
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@ -8430,8 +8436,7 @@ static bool trans_BFDOT_zzzz(DisasContext *s, arg_rrrr_esz *a)
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if (!dc_isar_feature(aa64_sve_bf16, s)) {
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return false;
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}
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return gen_gvec_ool_zzzz(s, gen_helper_gvec_bfdot,
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a->rd, a->rn, a->rm, a->ra, 0);
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return gen_gvec_ool_arg_zzzz(s, gen_helper_gvec_bfdot, a, 0);
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}
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static bool trans_BFDOT_zzxz(DisasContext *s, arg_rrxr_esz *a)
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@ -8448,8 +8453,7 @@ static bool trans_BFMMLA(DisasContext *s, arg_rrrr_esz *a)
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if (!dc_isar_feature(aa64_sve_bf16, s)) {
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return false;
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}
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return gen_gvec_ool_zzzz(s, gen_helper_gvec_bfmmla,
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a->rd, a->rn, a->rm, a->ra, 0);
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return gen_gvec_ool_arg_zzzz(s, gen_helper_gvec_bfmmla, a, 0);
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}
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static bool do_BFMLAL_zzzw(DisasContext *s, arg_rrrr_esz *a, bool sel)
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