hw/arm/smmu-common: Support 64-bit addresses
Addresses targeting the second translation table (TTB1) in the SMMU have all upper bits set. Ensure the IOMMU region covers all 64 bits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20230214171921.1917916-2-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -439,7 +439,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
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memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu),
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s->mrtypename,
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OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS);
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OBJECT(s), name, UINT64_MAX);
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address_space_init(&sdev->as,
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MEMORY_REGION(&sdev->iommu), name);
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trace_smmu_add_mr(name);
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@ -27,8 +27,6 @@
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#define SMMU_PCI_DEVFN_MAX 256
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#define SMMU_PCI_DEVFN(sid) (sid & 0xFF)
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#define SMMU_MAX_VA_BITS 48
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/*
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* Page table walk error types
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*/
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