hw/riscv/virt.c: fix the interrupts-extended property format of PLIC
The interrupts-extended property of PLIC only has 2 * hart number fields when KVM enabled, copy 4 * hart number fields to fdt will expose some uninitialized value. In this patch, I also refactor the code about the setting of interrupts-extended property of PLIC for improved readability. Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20231218090543.22353-1-yongxuan.wang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -437,24 +437,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
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"sifive,plic-1.0.0", "riscv,plic0"
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};
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if (kvm_enabled()) {
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plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
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} else {
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plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4);
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}
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for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
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if (kvm_enabled()) {
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plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT);
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} else {
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plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT);
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plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT);
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}
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}
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plic_phandles[socket] = (*phandle)++;
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plic_addr = memmap[VIRT_PLIC].base + (memmap[VIRT_PLIC].size * socket);
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plic_name = g_strdup_printf("/soc/plic@%lx", plic_addr);
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@ -467,8 +449,33 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
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(char **)&plic_compat,
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ARRAY_SIZE(plic_compat));
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qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0);
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qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
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plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4);
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if (kvm_enabled()) {
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plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
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for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
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plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT);
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}
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qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
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plic_cells,
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s->soc[socket].num_harts * sizeof(uint32_t) * 2);
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} else {
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plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4);
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for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
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plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT);
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plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]);
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plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT);
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}
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qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
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plic_cells,
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s->soc[socket].num_harts * sizeof(uint32_t) * 4);
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}
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qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg",
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0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size);
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qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev",
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