tcg: Widen gen_insn_data to uint64_t
We already pass uint64_t to restore_state_to_opc; this changes all of the other uses from insn_start through the encoding to decoding. Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -72,9 +72,11 @@ QEMU_BUILD_BUG_ON(CPU_TRACE_DSTATE_MAX_EVENTS >
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TBContext tb_ctx;
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/* Encode VAL as a signed leb128 sequence at P.
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Return P incremented past the encoded value. */
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static uint8_t *encode_sleb128(uint8_t *p, target_long val)
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/*
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* Encode VAL as a signed leb128 sequence at P.
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* Return P incremented past the encoded value.
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*/
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static uint8_t *encode_sleb128(uint8_t *p, int64_t val)
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{
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int more, byte;
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@ -92,21 +94,23 @@ static uint8_t *encode_sleb128(uint8_t *p, target_long val)
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return p;
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}
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/* Decode a signed leb128 sequence at *PP; increment *PP past the
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decoded value. Return the decoded value. */
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static target_long decode_sleb128(const uint8_t **pp)
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/*
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* Decode a signed leb128 sequence at *PP; increment *PP past the
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* decoded value. Return the decoded value.
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*/
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static int64_t decode_sleb128(const uint8_t **pp)
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{
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const uint8_t *p = *pp;
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target_long val = 0;
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int64_t val = 0;
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int byte, shift = 0;
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do {
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byte = *p++;
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val |= (target_ulong)(byte & 0x7f) << shift;
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val |= (int64_t)(byte & 0x7f) << shift;
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shift += 7;
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} while (byte & 0x80);
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if (shift < TARGET_LONG_BITS && (byte & 0x40)) {
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val |= -(target_ulong)1 << shift;
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val |= -(int64_t)1 << shift;
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}
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*pp = p;
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@ -132,7 +136,7 @@ static int encode_search(TranslationBlock *tb, uint8_t *block)
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int i, j, n;
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for (i = 0, n = tb->icount; i < n; ++i) {
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target_ulong prev;
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uint64_t prev;
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for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
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if (i == 0) {
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@ -444,7 +448,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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/* Dump header and the first instruction */
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fprintf(logfile, "OUT: [size=%d]\n", gen_code_size);
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fprintf(logfile,
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" -- guest addr 0x" TARGET_FMT_lx " + tb prologue\n",
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" -- guest addr 0x%016" PRIx64 " + tb prologue\n",
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tcg_ctx->gen_insn_data[insn][0]);
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chunk_start = tcg_ctx->gen_insn_end_off[insn];
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disas(logfile, tb->tc.ptr, chunk_start);
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@ -457,7 +461,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
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while (insn < tb->icount) {
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size_t chunk_end = tcg_ctx->gen_insn_end_off[insn];
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if (chunk_end > chunk_start) {
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fprintf(logfile, " -- guest addr 0x" TARGET_FMT_lx "\n",
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fprintf(logfile, " -- guest addr 0x%016" PRIx64 "\n",
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tcg_ctx->gen_insn_data[insn][0]);
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disas(logfile, tb->tc.ptr + chunk_start,
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chunk_end - chunk_start);
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@ -723,48 +723,27 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
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#endif
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#if TARGET_INSN_START_WORDS == 1
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc)
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{
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tcg_gen_op1(INDEX_op_insn_start, pc);
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TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 64 / TCG_TARGET_REG_BITS);
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tcg_set_insn_start_param(op, 0, pc);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc)
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{
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tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
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}
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# endif
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#elif TARGET_INSN_START_WORDS == 2
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
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{
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tcg_gen_op2(INDEX_op_insn_start, pc, a1);
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TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 2 * 64 / TCG_TARGET_REG_BITS);
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tcg_set_insn_start_param(op, 0, pc);
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tcg_set_insn_start_param(op, 1, a1);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
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{
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tcg_gen_op4(INDEX_op_insn_start,
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(uint32_t)pc, (uint32_t)(pc >> 32),
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(uint32_t)a1, (uint32_t)(a1 >> 32));
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}
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# endif
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#elif TARGET_INSN_START_WORDS == 3
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# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
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target_ulong a2)
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{
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tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
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TCGOp *op = tcg_emit_op(INDEX_op_insn_start, 3 * 64 / TCG_TARGET_REG_BITS);
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tcg_set_insn_start_param(op, 0, pc);
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tcg_set_insn_start_param(op, 1, a1);
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tcg_set_insn_start_param(op, 2, a2);
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}
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# else
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static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
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target_ulong a2)
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{
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tcg_gen_op6(INDEX_op_insn_start,
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(uint32_t)pc, (uint32_t)(pc >> 32),
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(uint32_t)a1, (uint32_t)(a1 >> 32),
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(uint32_t)a2, (uint32_t)(a2 >> 32));
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}
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# endif
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#else
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# error "Unhandled number of operands to insn_start"
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#endif
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@ -190,7 +190,7 @@ DEF(mulsh_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_mulsh_i64))
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#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
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/* QEMU specific */
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DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_WORDS,
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DEF(insn_start, 0, 0, DATA64_ARGS * TARGET_INSN_START_WORDS,
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TCG_OPF_NOT_PRESENT)
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DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
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DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
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@ -629,7 +629,7 @@ struct TCGContext {
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TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS];
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uint16_t gen_insn_end_off[TCG_MAX_INSNS];
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target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
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uint64_t gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
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/* Exit to translator on overflow. */
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sigjmp_buf jmp_trans;
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@ -771,24 +771,24 @@ static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
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op->args[arg] = v;
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}
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static inline target_ulong tcg_get_insn_start_param(TCGOp *op, int arg)
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static inline uint64_t tcg_get_insn_start_param(TCGOp *op, int arg)
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{
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#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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return tcg_get_insn_param(op, arg);
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#else
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return tcg_get_insn_param(op, arg * 2) |
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((uint64_t)tcg_get_insn_param(op, arg * 2 + 1) << 32);
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#endif
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if (TCG_TARGET_REG_BITS == 64) {
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return tcg_get_insn_param(op, arg);
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} else {
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return deposit64(tcg_get_insn_param(op, arg * 2), 32, 32,
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tcg_get_insn_param(op, arg * 2 + 1));
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}
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}
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static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v)
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static inline void tcg_set_insn_start_param(TCGOp *op, int arg, uint64_t v)
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{
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#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
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tcg_set_insn_param(op, arg, v);
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#else
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tcg_set_insn_param(op, arg * 2, v);
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tcg_set_insn_param(op, arg * 2 + 1, v >> 32);
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#endif
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if (TCG_TARGET_REG_BITS == 64) {
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tcg_set_insn_param(op, arg, v);
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} else {
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tcg_set_insn_param(op, arg * 2, v);
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tcg_set_insn_param(op, arg * 2 + 1, v >> 32);
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}
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}
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/* The last op that was emitted. */
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18
tcg/tcg.c
18
tcg/tcg.c
@ -2384,13 +2384,8 @@ static void tcg_dump_ops(TCGContext *s, FILE *f, bool have_prefs)
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col += ne_fprintf(f, "\n ----");
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for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
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target_ulong a;
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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a = deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + 1]);
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#else
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a = op->args[i];
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#endif
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col += ne_fprintf(f, " " TARGET_FMT_lx, a);
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col += ne_fprintf(f, " %016" PRIx64,
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tcg_get_insn_start_param(op, i));
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}
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} else if (c == INDEX_op_call) {
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const TCGHelperInfo *info = tcg_call_info(op);
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@ -6081,13 +6076,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, target_ulong pc_start)
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}
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num_insns++;
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for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
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target_ulong a;
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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a = deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + 1]);
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#else
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a = op->args[i];
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#endif
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s->gen_insn_data[num_insns][i] = a;
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s->gen_insn_data[num_insns][i] =
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tcg_get_insn_start_param(op, i);
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}
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break;
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case INDEX_op_discard:
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