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target/avr: Add basic parameters of the new platform

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This includes definitions of various basic parameters needed
for integration of a new platform into QEMU.

[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[thuth: Simplify MAINTAINERS right from the start]
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-2-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Michael Rolnik 2020-01-24 01:51:07 +01:00 committed by Philippe Mathieu-Daudé
parent f2a1cf9180
commit c8c0d267fd
3 changed files with 108 additions and 0 deletions
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6
MAINTAINERS
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@ -167,6 +167,12 @@ S: Maintained
F: hw/arm/smmu*
F: include/hw/arm/smmu*
AVR TCG CPUs
M: Michael Rolnik <mrolnik@gmail.com>
R: Sarah Harris <S.E.Harris@kent.ac.uk>
S: Maintained
F: target/avr/
CRIS TCG CPUs
M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
S: Maintained

36
target/avr/cpu-param.h Normal file
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@ -0,0 +1,36 @@
/*
* QEMU AVR CPU
*
* Copyright (c) 2016-2020 Michael Rolnik
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
#ifndef AVR_CPU_PARAM_H
#define AVR_CPU_PARAM_H
#define TARGET_LONG_BITS 32
/*
* TARGET_PAGE_BITS cannot be more than 8 bits because
* 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
* should be implemented as a device and not memory
* 2. SRAM starts at the address 0x0100
*/
#define TARGET_PAGE_BITS 8
#define TARGET_PHYS_ADDR_SPACE_BITS 24
#define TARGET_VIRT_ADDR_SPACE_BITS 24
#define NB_MMU_MODES 2
#endif

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target/avr/cpu.h Normal file
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/*
* QEMU AVR CPU
*
* Copyright (c) 2016-2020 Michael Rolnik
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
#ifndef QEMU_AVR_CPU_H
#define QEMU_AVR_CPU_H
#include "exec/cpu-defs.h"
#define TCG_GUEST_DEFAULT_MO 0
/*
* AVR has two memory spaces, data & code.
* e.g. both have 0 address
* ST/LD instructions access data space
* LPM/SPM and instruction fetching access code memory space
*/
#define MMU_CODE_IDX 0
#define MMU_DATA_IDX 1
#define EXCP_RESET 1
#define EXCP_INT(n) (EXCP_RESET + (n) + 1)
/* Number of CPU registers */
#define NUMBER_OF_CPU_REGISTERS 32
/* Number of IO registers accessible by ld/st/in/out */
#define NUMBER_OF_IO_REGISTERS 64
/*
* Offsets of AVR memory regions in host memory space.
*
* This is needed because the AVR has separate code and data address
* spaces that both have start from zero but have to go somewhere in
* host memory.
*
* It's also useful to know where some things are, like the IO registers.
*/
/* Flash program memory */
#define OFFSET_CODE 0x00000000
/* CPU registers, IO registers, and SRAM */
#define OFFSET_DATA 0x00800000
/* CPU registers specifically, these are mapped at the start of data */
#define OFFSET_CPU_REGISTERS OFFSET_DATA
/*
* IO registers, including status register, stack pointer, and memory
* mapped peripherals, mapped just after CPU registers
*/
#define OFFSET_IO_REGISTERS (OFFSET_DATA + NUMBER_OF_CPU_REGISTERS)
#endif /* !defined (QEMU_AVR_CPU_H) */