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Malta flash support.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3887 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-01-04 19:11:32 +00:00
parent b67bfe8d9f
commit c8b153d794
3 changed files with 74 additions and 45 deletions
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1
Makefile.target
View File

@ -470,6 +470,7 @@ VL_OBJS+= jazz_led.o
VL_OBJS+= ide.o gt64xxx.o pckbd.o ps2.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o VL_OBJS+= ide.o gt64xxx.o pckbd.o ps2.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
VL_OBJS+= piix_pci.o parallel.o cirrus_vga.o $(SOUND_HW) VL_OBJS+= piix_pci.o parallel.o cirrus_vga.o $(SOUND_HW)
VL_OBJS+= mipsnet.o VL_OBJS+= mipsnet.o
VL_OBJS+= pflash_cfi01.o
CPPFLAGS += -DHAS_AUDIO CPPFLAGS += -DHAS_AUDIO
endif endif
ifeq ($(TARGET_BASE_ARCH), cris) ifeq ($(TARGET_BASE_ARCH), cris)

81
hw/mips_malta.c
View File

@ -28,6 +28,8 @@
#include "net.h" #include "net.h"
#include "boards.h" #include "boards.h"
#include "smbus.h" #include "smbus.h"
#include "block.h"
#include "flash.h"
#include "mips.h" #include "mips.h"
#include "pci.h" #include "pci.h"
#include "qemu-char.h" #include "qemu-char.h"
@ -35,6 +37,8 @@
#include "audio/audio.h" #include "audio/audio.h"
#include "boards.h" #include "boards.h"
//#define DEBUG_BOARD_INIT
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
#define BIOS_FILENAME "mips_bios.bin" #define BIOS_FILENAME "mips_bios.bin"
#else #else
@ -766,13 +770,13 @@ void mips_malta_init (int ram_size, int vga_ram_size,
{ {
char buf[1024]; char buf[1024];
unsigned long bios_offset; unsigned long bios_offset;
target_long bios_size;
int64_t kernel_entry; int64_t kernel_entry;
PCIBus *pci_bus; PCIBus *pci_bus;
CPUState *env; CPUState *env;
RTCState *rtc_state; RTCState *rtc_state;
fdctrl_t *floppy_controller; fdctrl_t *floppy_controller;
MaltaFPGAState *malta_fpga; MaltaFPGAState *malta_fpga;
int ret;
qemu_irq *i8259; qemu_irq *i8259;
int piix4_devfn; int piix4_devfn;
uint8_t *eeprom_buf; uint8_t *eeprom_buf;
@ -781,6 +785,8 @@ void mips_malta_init (int ram_size, int vga_ram_size,
int index; int index;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD]; BlockDriverState *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = 0;
/* init CPUs */ /* init CPUs */
if (cpu_model == NULL) { if (cpu_model == NULL) {
@ -801,7 +807,7 @@ void mips_malta_init (int ram_size, int vga_ram_size,
/* allocate RAM */ /* allocate RAM */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
/* Map the bios at two physical locations, as on the real board */ /* Map the bios at two physical locations, as on the real board. */
bios_offset = ram_size + vga_ram_size; bios_offset = ram_size + vga_ram_size;
cpu_register_physical_memory(0x1e000000LL, cpu_register_physical_memory(0x1e000000LL,
BIOS_SIZE, bios_offset | IO_MEM_ROM); BIOS_SIZE, bios_offset | IO_MEM_ROM);
@ -811,35 +817,9 @@ void mips_malta_init (int ram_size, int vga_ram_size,
/* FPGA */ /* FPGA */
malta_fpga = malta_fpga_init(0x1f000000LL, env); malta_fpga = malta_fpga_init(0x1f000000LL, env);
/* Load a BIOS image unless a kernel image has been specified. */ /* Load firmware in flash / BIOS unless we boot directly into a kernel. */
if (!kernel_filename) {
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
ret = load_image(buf, phys_ram_base + bios_offset);
if (ret < 0 || ret > BIOS_SIZE) {
fprintf(stderr,
"qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
buf);
exit(1);
}
/* In little endian mode the 32bit words in the bios are swapped,
a neat trick which allows bi-endian firmware. */
#ifndef TARGET_WORDS_BIGENDIAN
{
uint32_t *addr;
for (addr = (uint32_t *)(phys_ram_base + bios_offset);
addr < (uint32_t *)(phys_ram_base + bios_offset + ret);
addr++) {
*addr = bswap32(*addr);
}
}
#endif
}
/* If a kernel image has been specified, write a small bootloader
to the flash location. */
if (kernel_filename) { if (kernel_filename) {
/* Write a small bootloader to the flash location. */
loaderparams.ram_size = ram_size; loaderparams.ram_size = ram_size;
loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_filename = kernel_filename;
loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.kernel_cmdline = kernel_cmdline;
@ -847,6 +827,47 @@ void mips_malta_init (int ram_size, int vga_ram_size,
kernel_entry = load_kernel(env); kernel_entry = load_kernel(env);
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
write_bootloader(env, bios_offset, kernel_entry); write_bootloader(env, bios_offset, kernel_entry);
} else {
index = drive_get_index(IF_PFLASH, 0, fl_idx);
if (index != -1) {
/* Load firmware from flash. */
bios_size = 0x400000;
fl_sectors = bios_size >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
"offset %08lx addr %08llx '%s' %x\n",
fl_idx, bios_size, bios_offset, 0x1e000000LL,
bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
#endif
pflash_cfi01_register(0x1e000000LL, bios_offset,
drives_table[index].bdrv, 65536, fl_sectors,
4, 0x0000, 0x0000, 0x0000, 0x0000);
fl_idx++;
} else {
/* Load a BIOS image. */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
fprintf(stderr,
"qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
buf);
exit(1);
}
}
/* In little endian mode the 32bit words in the bios are swapped,
a neat trick which allows bi-endian firmware. */
#ifndef TARGET_WORDS_BIGENDIAN
{
uint32_t *addr;
for (addr = (uint32_t *)(phys_ram_base + bios_offset);
addr < (uint32_t *)(phys_ram_base + bios_offset + bios_size);
addr++) {
*addr = bswap32(*addr);
}
}
#endif
} }
/* Board ID = 0x420 (Malta Board with CoreLV) /* Board ID = 0x420 (Malta Board with CoreLV)

37
hw/pflash_cfi01.c
View File

@ -111,8 +111,8 @@ static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width)
else if (pfl->width == 4) else if (pfl->width == 4)
boff = boff >> 2; boff = boff >> 2;
DPRINTF("%s: reading offset %08x under cmd %02x\n", DPRINTF("%s: reading offset " TARGET_FMT_lx " under cmd %02x\n",
__func__, boff, pfl->cmd); __func__, boff, pfl->cmd);
switch (pfl->cmd) { switch (pfl->cmd) {
case 0x00: case 0x00:
@ -121,7 +121,8 @@ static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width)
switch (width) { switch (width) {
case 1: case 1:
ret = p[offset]; ret = p[offset];
DPRINTF("%s: data offset %08x %02x\n", __func__, offset, ret); DPRINTF("%s: data offset " TARGET_FMT_lx " %02x\n",
__func__, offset, ret);
break; break;
case 2: case 2:
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
@ -131,7 +132,8 @@ static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width)
ret = p[offset]; ret = p[offset];
ret |= p[offset + 1] << 8; ret |= p[offset + 1] << 8;
#endif #endif
DPRINTF("%s: data offset %08x %04x\n", __func__, offset, ret); DPRINTF("%s: data offset " TARGET_FMT_lx " %04x\n",
__func__, offset, ret);
break; break;
case 4: case 4:
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
@ -146,7 +148,8 @@ static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width)
ret |= p[offset + 2] << 16; ret |= p[offset + 2] << 16;
ret |= p[offset + 3] << 24; ret |= p[offset + 3] << 24;
#endif #endif
DPRINTF("%s: data offset %08x %08x\n", __func__, offset, ret); DPRINTF("%s: data offset " TARGET_FMT_lx " %08x\n",
__func__, offset, ret);
break; break;
default: default:
DPRINTF("BUG in %s\n", __func__); DPRINTF("BUG in %s\n", __func__);
@ -208,8 +211,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
else else
offset -= pfl->base; offset -= pfl->base;
DPRINTF("%s: offset %08x %08x %d wcycle 0x%x\n", DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d wcycle 0x%x\n",
__func__, offset, value, width, pfl->wcycle); __func__, offset, value, width, pfl->wcycle);
/* Set the device in I/O access mode */ /* Set the device in I/O access mode */
cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem);
@ -230,8 +233,9 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
p = pfl->storage; p = pfl->storage;
offset &= ~(pfl->sector_len - 1); offset &= ~(pfl->sector_len - 1);
DPRINTF("%s: block erase at 0x%x bytes 0x%x\n", __func__, DPRINTF("%s: block erase at " TARGET_FMT_lx " bytes "
offset, pfl->sector_len); TARGET_FMT_lx "\n",
__func__, offset, pfl->sector_len);
memset(p + offset, 0xff, pfl->sector_len); memset(p + offset, 0xff, pfl->sector_len);
pflash_update(pfl, offset, pfl->sector_len); pflash_update(pfl, offset, pfl->sector_len);
@ -278,7 +282,7 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
break; break;
case 0xe8: case 0xe8:
DPRINTF("%s: block write of 0x%x bytes\n", __func__, cmd); DPRINTF("%s: block write of %x bytes\n", __func__, cmd);
pfl->counter = cmd; pfl->counter = cmd;
pfl->wcycle++; pfl->wcycle++;
break; break;
@ -311,8 +315,9 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
switch (pfl->cmd) { switch (pfl->cmd) {
case 0xe8: /* Block write */ case 0xe8: /* Block write */
p = pfl->storage; p = pfl->storage;
DPRINTF("%s: block write offset 0x%x value 0x%x counter 0x%x\n", DPRINTF("%s: block write offset " TARGET_FMT_lx
__func__, offset, value, pfl->counter); " value %x counter " TARGET_FMT_lx "\n",
__func__, offset, value, pfl->counter);
switch (width) { switch (width) {
case 1: case 1:
p[offset] = value; p[offset] = value;
@ -382,8 +387,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value,
error_flash: error_flash:
printf("%s: Unimplemented flash cmd sequence " printf("%s: Unimplemented flash cmd sequence "
"(offset 0x%x, wcycle 0x%x cmd 0x%x value 0x%x\n", "(offset " TARGET_FMT_lx ", wcycle 0x%x cmd 0x%x value 0x%x\n",
__func__, offset, pfl->wcycle, pfl->cmd, value); __func__, offset, pfl->wcycle, pfl->cmd, value);
reset_flash: reset_flash:
cpu_register_physical_memory(pfl->base, pfl->total_len, cpu_register_physical_memory(pfl->base, pfl->total_len,
@ -484,7 +489,7 @@ static int ctz32 (uint32_t n)
} }
pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
BlockDriverState *bs, target_ulong sector_len, BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width, int nb_blocs, int width,
uint16_t id0, uint16_t id1, uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3) uint16_t id2, uint16_t id3)
@ -495,9 +500,11 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
total_len = sector_len * nb_blocs; total_len = sector_len * nb_blocs;
/* XXX: to be fixed */ /* XXX: to be fixed */
#if 0
if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) &&
total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024))
return NULL; return NULL;
#endif
pfl = qemu_mallocz(sizeof(pflash_t)); pfl = qemu_mallocz(sizeof(pflash_t));